PM7344 datasheet(52/293 Pages) PMC

52 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Pin Name

Type

No.

Function

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

I/O

Bidirectional Data Bus (D[7:0]). This bus is used

during S/UNI-MPH read and write accesses.

RDB

Input

112

Active low Read Enable (RDB). This signal is

pulsed low to enable a S/UNI-MPH register read

access. The S/UNI-MPH drives the D[7:0] bus

with the contents of the addressed register while

RDB and CSB are both low.

WRB

Input

111

Active low Write Strobe (WRB). This signal is

pulsed low to enable a S/UNI-MPH register write

access. The D[7:0] bus is clocked into the

addressed register on the rising edge of WRB

while CSB is low.

ALE

Input

114

Address Latch Enable (ALE). This signal latches

the address bus contents, A[10:0], when low,

allowing the S/UNI-MPH to be interfaced to a

multiplexed address/data bus. When ALE is

high, the address latches are transparent. ALE

has an integral pull-up resistor.

RSTB

Input

110

Active low Reset (RSTB). This signal is set low

to asynchronously reset the S/UNI-MPH. RSTB

is a Schmitt-trigger input with an integral pull-up

resistor.

A[0]

A[1]

A[2]

A[3]

A[4]

A[5]

A[6]

A[7]

A[8]

A[9]

A[10]

Input

117

118

119

120

121

122

123

124

125

126

127

Address Bus (A[10:0]). This bus selects specific

registers during S/UNI-MPH register accesses.

PM7344 Datasheet(PDF) 52 Page - PMC-Sierra, Inc

PM7344 Datasheet(HTML) 52 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL