ST72324BJ datasheet(9/188 Pages) STMICROELECTRONICS

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ST72324B

Description

9/188

Description

The ST72324B devices are members of the ST7 microcontroller family designed for mid-

range applications running from 3.8 to 5.5V. Different package options offer up to 32 I/O

pins.

All devices are based on a common industry-standard 8-bit core, featuring an enhanced

instruction set and are available with Flash or ROM program memory. The ST7 family

architecture offers both power and flexibility to software developers, enabling the design of

highly efficient and compact application code.

The on-chip peripherals include an A/D converter, two general purpose timers, an SPI

interface and an SCI interface. For power economy, the microcontroller can switch

dynamically into, Slow, Wait, Active Halt or Halt mode when the application is in idle or

stand-by state.

Typical applications include consumer, home, office and industrial products.

Figure 1.

Device block diagram

8-bit CORE

ALU

OSC1

VPP

CONTROL

Program

(8 - 32 Kbytes)

VDD

RESET

PORT F

PF7:6, 4, 2:0

TIMER A

BEEP

PORT A

RAM

(384 - 1024 bytes)

PORT C

10-bit ADC

VAREF

VSSA

PORT B

PB4:0

PORT E

PE1:0

(2 bits)

SCI

TIMER B

PA7:3

(5 bits on J devices)

PORT D

PD5:0

SPI

PC7:0

(8 bits)

VSS

WATCHDOG

OSC

LVD

OSC2

memory

MCC/RTC/BEEP

(4 bits on K devices)

(5 bits on J devices)

(3 bits on K devices)

(6 bits on J devices)

(2 bits on K devices)

(6 bits on J devices)

(5 bits on K devices)

ST72324BJ Datasheet(PDF) 9 Page - STMicroelectronics

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