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MCS7840
USB-2.0 to Four Serial Ports
Page 14
Rev.
1.2
Line Control Register (LCR):
The LCR specifies the data format that is common to both transmitter and receiver.
Register:
LCR
Description:
Line Control Register
Offset:
3
Permissions:
Read/Write
Access Condition:
Default Value:
0x00
Bit[7]
Bit[6]
Bit[5]
Bit[4]
Bit[3]
Bit[2]
Bit[1]
Bit[0]
DLE
TX
Break
Force
Parity
Odd/Even
Parity
Parity
Enable
Number of
Stop-Bits
Data
Length
LCR[1:0] Data Length of serial characters.
LCR[2]
Number of Stop-Bits per serial character.
LCR[5:3] Parity Type
The selected parity type will be generated
during transmission and checked by the
receiver, which may produce a parity
error as a result. In 9-bit mode parity is
disabled and LCR[5:3] are ignored.
LCR[6]
Transmission Break
Logic 0:
Transmission Break Disabled.
Logic 1:
Forces the transmitter data
output SOUT low to alert the
communications channel, or
sends zeroes in IrDA mode.
LCR[7]
Divisor Latch Enable
Logic 0:
Accesses to DLL and DLM
registers disabled.
Logic 1:
Accesses to DLL and DLM
registers enabled.
LCR[1:0]
Data Length
2’b00
5 bits
2’b01
6 bits
2’b10
7 bits
2’b11
8 bits
LCR[2]
Data Length
Number of
Stop-Bits
0
5, 6, 7, 8
1
1
5
1.5
1
6, 7, 8
2
LCR[5:3]
Parity Type
3’bxx0
No Parity
3’b001
Odd Parity
3’b011
Even Parity
3’b101
Parity bit forced to 1
3’b111
Parity bit forced to 0
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