AS8267 datasheet(112/136 Pages) AMSCO

112 / 136 page

Data Sheet AS8267 / AS8268

Revision 1.0, 19-Jun-07

Page 112 of 136

Notes:

When ‘enable_crc’ is set to 1 a 16-bit checksum word will be sent after the data stream. It can be used to validate the

received data.

Before accessing the Flash a request has to be sent (see

Arbitration)

Write to XDATA Address

This command is used for Flash and external EEPROM write access.

For evaluation, but also for setting the RTC it will be required to write to registers located in the XDATA

address space. Also for this an SCT command is prepared. The diagram in the section before shows the main

blocks involved. Again the whole XDATA range of 64k bytes is visible to the WRITE_X instruction. However, for

the Flash memory (including addresses 0000h to 7FFFh) there are some considerations to take when

programming the device. Besides the ‘byte write’ command, there are also ‘page write’, ‘page_erase’ and ‘mass

erase’.

Notes:

Before accessing the Flash a request has to be sent (see

Arbitration)

In principle it is possible that a value, which has been modified using this write-command, immediately gets overwritten

by the MCU. Therefore this command has to be used in an intelligent way.

Transmission Protocol:

In order to make the data transfer easier for the system control a defined protocol is used for talking to the

UART1, where also the length of the data to be written to the XDATA address space is specified at the

beginning of the transmission. It looks like this:

Write Command

(8 bits)

Start Address

(16 bits)

Block Length

(16 bits)

Data

...

Acknowledge

(TXD)

Notes:

When ‘enable_crc’ is set to 0 the UART1 only sends back the acknowledge word (FAh).

When ‘enable_crc’ is set to 1 a 16-bit checksum has to be transferred to the UART1 at the end of the data stream. The

SCT will calculate the checksum and depending on the result it will send back the acknowledge word (FAh) or the not-

acknowledge word (FBh).

Transmission Protocol for FLASH BYTE PROGRAM and FLASH PAGE PROGRAM:

The protocol is the same as for a manual write operation to a register. The only difference is that after reaching

the desired block length, a Flash program process is triggered, which takes 6ms maximum. The device detects

automatically a Flash programming process when selecting an address lower than 8000h. The user is

responsible for the correct programming and handling of Flash pages.

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