MPC8280 datasheet(511/1386 Pages) FREESCALE

511 / 1386 page

Memory Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

11-91

•

If GPL_4 is not used as an output, the performance for a page read access can be improved by

setting MxMR[GPL_x4DIS]. The following example shows how the burst read access to FPM

DRAM (no LOOP) can be modified using this feature. In this case the configuration registers are

defined in the following way.

The timing diagram in Figure 11-75 shows how the burst-read access shown in Figure 11-70 can be

reduced.

Table 11-43. UPMs Attributes Example

Explanation

Field

Value

Machine select UPMA

x[MS]

0b100

Port size 64-bit

x[PS]

0b00

No write protect (R/W)

x[WP]

0b0

Refresh timer value (1024 refresh cycles)

PURT[PURT]

0x0C

Refresh timer enable

xMR[RFEN]

0b1

Address multiplex size

xMR[AMx]

0b010

Disable timer period

xMR[DSx]

0b01

Select between GPL4 and UPMWAIT = UPMWAIT, data sampled at clock

negative edge

xMR[GPL_x4DIS]

0b1

Burst inhibit device

x[BI]

0b0

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