MPC8280 datasheet(986/1386 Pages) FREESCALE

986 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

31-26

Freescale Semiconductor

31.5.2

RM Cell Structure

Table 31-7 describes the structure of the RM cell supported by the MPC8280. For more information, see

the ABR flow-control traffic management specification (TM 4.0) on the ATM Forum website.

31.5.2.1

RM Cell Rate Representation

Rates in the RM cells are represented in a binary floating-point format using a 5-bit exponent (e), a 9-bit

mantissa (m), and a 1-bit nonzero flag (nz), as shown in Figure 31-15.

The rate (in cells/second) is calculated as in Figure 31-16.

Figure 31-16. Rate Formula for RM Cells

Table 31-7. Fields and their Positions in RM Cells

Fields

Octet

Bits

Description

Value

Header

1–5

All

ATM cell header

RM-VCC

PTI=6

All

Protocol ID

DIR

Direction of RM cell (0 = forward, 1 = backward)

Backward notification (BN = 0, the cell was generated by the source;

BN=1, the cell was generated by the network or by the destination)

Congestion indication. (1 = congestion, 0 = otherwise)

No increase indication. (1 = no increase allowed, 0 = otherwise)

Not used (ATM Forum ABR)

—

5–7

Reserved, should be cleared.

8–9

All

Explicit rate; see Section 31.5.2.1

CCR

10–11

All

Current cell rate; see Section 31.5.2.1

MCR

12–13

All

Minimum cell rate; see Section 31.5.2.1

14–17

All

Not used (ATM Forum ABR)

18–21

All

Not used (ATM Forum ABR)

—

22–51

All

Reserved, should be cleared.

0x6A for each byte

—

0–5

Reserved, should be cleared.

CRC-10

6–7

CRC-10

All

Exponent

Mantissa

Figure 31-15. Rate Format for RM Cells

Ra te

512

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