MPC8280 datasheet(1092/1386 Pages) FREESCALE

1092 / 1386 page

ATM AAL1 Circuit Emulation Service

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

32-32

Freescale Semiconductor

32.9.2

Transmit Connection Table (TCT)

Figure 32-23 shows the format of an TCT entry.

Table 32-7 describes general TCT fields.

01234567

Offset + 0x00

—

GBL

—

DTB

BIB

—

ATT

AVCF VCON

INTQ

Offset + 0x02

—

AAL

Offset + 0x04

Tx Data Buffer Pointer (TXDBPTR)

Offset + 0x06

Offset + 0x08

TBDCNT

Offset + 0x0A

TBD_OFFSET

Offset + 0x0C

Rate Remainder

PCR Fraction

Offset + 0x0E

PCR

Offset + 0x10

Protocol Specific. Refer to Section 32.9.2.1, “AAL1 CES Protocol-Specific TCT.”

Offset + 0x12

Offset + 0x14

Offset + 0x16

APC Linked Channel

Offset + 0x18

ATM Cell Header (VPI,VCI,PTI,CLP)

Offset + 0x1a

Offset + 0x1C

—

PMT

TBD_BASE

Offset + 0x1E

TBD_BASE

BNM

STPT

IMK

Figure 32-23. Transmit Connection Table (TCT) Entry

Table 32-7. TCT Field Descriptions

Offset

Bits

Name

Description

0x00

0–1

—

Reserved, should be cleared during initialization.

GBL

Global. Asserting GBL enables snooping of data buffers, BDs, interrupt queues and free

buffer pool.

3–4

Byte ordering. This field is used for data buffers.

00 Reserved.

01 Power PC little endian.

1x Big endian.

—

Reserved, should be cleared during initialization.

DTB

Data buffer and CES transmit cell scratchpad bus placement

0 Reside on the 60x bus.

1 Reside on the local bus.

Note: TCT[DTB] programming must be consistent across all CES transmit channels

because they share the same TCELL_TMP_BASE_EXT parameter.

BIB

BD and interrupt queue bus

0 Reside on the 60xbus.

1 Reside on the local bus.

Note: When using AAL5, AAL1 or AAL1 CES in UDC mode, BDs and data should be

placed on the same bus (TCT[DTB]=TCT[BIB]).

8–9

—

Reserved, should be cleared during initialization.

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