MPC8280 datasheet(1157/1386 Pages) FREESCALE

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Inverse Multiplexing for ATM (IMA)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

34-11

At startup, the non-TRL links will transmit filler cells until their transmit queues have reached a minimum

depth. In order to maintain less than the specified maximum +/-2.5 cell transmit timing differential (for

cells within an IMA frame), the TRL must exhibit the same behavior. Therefore, a 4-cell transmit buffer

is also maintained for the timing reference link. The timing reference link will only begin to pass ATM

layer cells to its PHY after it has 3 cells in its buffer. Prior to this, it will send filler cells. This behavior

will only be experienced at group start-up.

The TRL task will also implement the standard amount of stuffing on the TRL link by maintaining a

counter. When this task has scheduled (2048/ M) ICP cells for the TRL, a TRL stuff event will be flagged

and an indication of an upcoming stuff event will be signaled in the ICP LSI field. If a TRL stuff event is

flagged when the TRL task triggers, then a stuff cell will be sent to the TRL’s transmit queue, but no cells

will be sent to the transmit queues of the non-TRL PHYs. This forces a standard amount of stuffing on the

TRL, thereby reducing the effective data bit rate of the TRL to less than the minimum data clock rate

allowed by the clock rate tolerance of the physical-layer standard. Therefore by definition, this effective

data bit rate is achievable by the non-TRL links; the non-TRL links can either stuff less (if their data clock

rate is slower than the TRL), or stuff more (if their data clock rate is faster than the TRL).

34.3.2.1.1

TRL Service Latency

NOTE

The functionality described in this section is available only with the latest

RAM microcode package.

This optional feature allows the user to change the IMA APC behavior upon TRL request. When enabled

the TRL request will pass a programmable number of cells to the Tx queue of the links in an IMA group.

This can be used in order to suppress the TRL from consuming a large amount of bandwidth before another

cell is transmitted. The TRL request normally places a cell in a queue for N links where the group contains

N links; after this happens then a non_TRL link is free to pass a cell over the UTOPIA interface. The delay

for the TRL can be long and in some cases the TC layer FIFO can underrun. This feature can be used to

ensure that TRL and non-TRL requests are handled in the same manner - 1 cell in 1 cell out to the transmit

queues. The non-TRL requests will also trigger APC iterations when this feature is enabled. When using

this feature, the depth of the TRL transmit queue must equal the non-TRL queues.

34.3.2.2

Non-TRL Operation

A request from a non-TRL PHY does not trigger any scheduling task. The cells for non-TRL links will

already be supplied (by the TRL task) in its associated transmit queue. The TRL will simply read a cell out

of its transmit queue and update the queue pointers.

If the transmit queue becomes too shallow (because this link’s request rate is faster than the TRL), the link

will flag that a stuff event is imminent. The link will signal an upcoming stuff event in the LSI field of its

next ICP cell and will then flag that a stuff event is due. Having flagged this stuff event, the link will

continue sending cells from its queue as normal until it reaches its next ICP cell, upon which it indicates

a stuff event in the ICP cell and transmits it, but does not update the transmit queue pointers. When the link

next requests a cell, the previous ICP cell is repeated (since the queue pointers were not updated). This

process causes the transmit queue to deepen to the intended level.

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