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MPC8280 Datasheet(PDF) 1327 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1327 Page - Freescale Semiconductor, Inc

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Parallel I/O Ports
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
41-11
PA12
FCC1: RxD[2]1
UTOPIA 8
FCC1: RxD[10]1
UTOPIA 16
GND
MSNUM[3]2
PA11
FCC1: RxD[1]1
UTOPIA 8
FCC1: RxD[9] 1
UTOPIA 16
GND
MSNUM[4]2
PA10
FCC1: RxD[0]1
UTOPIA 8
FCC1: RxD[8]1
UTOPIA 16
GND
MSNUM[5]2
PA9
SMC2: SMTXD
TDM_A1: L1TXD[0]
Output, nibble
TDM_A1: L1TXD
Inout, serial
GND
PA8
FCC2: TxAddr[4]
SMC2: SMRXD
(primary option)
by PD4
TDM_A1: L1RXD[0]
Input, nibble
TDM_A1: L1RXD
Inout, serial
GND
PA7
FCC2: TxAddr[3]
SMC2: SMSYN
(primary option)
by PC0
TDM_A1:
L1TSYNC/GRANT
GND
PA6
FCC2: RxAddr[3]
TDM_A1: L1RSYNC
GND
PA5
SCC2: RSTRT
FCC1: RxPrty1
UTOPIA
(secondary option)
GND
FCC2: RxAddr[2]1
MPHY master
IDMA4: DREQ
GND
PA4
FCC2: RxAddr[1]1
MPHY master
SCC2: REJECT
VDD
IDMA4: DONE
Inout
VDD
PA3
FCC2: RxAddr[0]1
MPHY master
CLK19
GND
IDMA4: DACK
TDM_A2: L1RXD[1]
Nibble
GND
PA2
FCC2: TxAddr[0]1
MPHY master
CLK20
GND
IDMA3: DACK
PA1
FCC2: TxAddr[1]1
MPHY master
SCC1: REJECT
VDD
IDMA3: DONE
Inout
VDD
PA0
SCC1: RSTRT
FCC2: TxAddr[2]1
MPHY master
IDMA3: DREQ
GND
1 Not available on the MPC8270.
2 MSNUM[0–4] is the sub-block code of the peripheral controller using SDMA; MSNUM[5] indicates which section,
transmit or receive, is active during the transfer. See Section 19.2.4, “SDMA Transfer Error MSNUM Registers
(PDTEM and LDTEM).”
Table 41-5. Port A—Dedicated Pin Assignment (PPARA = 1) (continued)
Pin
Pin Function
PSORA = 0
PSORA = 1
PDIRA = 1 (Output)
PDIRA = 0 (Input)
Defaul
t Input
PDIRA = 1 (Output)
PDIRA = 0 (Input, or
Inout if Specified)
Defaul
t Input



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