TMP88CU74F datasheet(90/132 Pages) TOSHIBA

90 / 132 page

TMP88CU74

2003-02-17

88CU74-90

(11) Slave address match detection monitor

The AAS (bit 2 in SBISR) is set to “1” in the slave mode, in the address recognition

mode (ALS = 0), or when receiving a slave address with the same value that sets a

GENERAL CALL or I2CAR. When the ALS is “1”, the AAS is set to “1” after receiving

the first 1-word of data. The AAS is cleared to “0” by after writing/reading data to/from

a data buffer register.

(12) GENERAL CALL detection monitor

The AD0 (bit 1 in SBISR) is set to “1” in the slave mode, when all 8-bit data received

immediately after a start condition are “0”. The AD0 is cleared to “0” when a start or

stop condition is detected on the bus.

(13) Last received bit monitor

The SDA value stored at the rising edge of the SCL line is set to the LRB (bit 0 in

SBISR). When the contents of the LRB are read immediately after an INTSBI

interrupt request is generated in the acknowledge mode, and ACK signal is read.

(14) Software Reset Function

Software reset function is used to initialize SBI, when SBI is rocked by external

noise, etc.

SWRST (bit 0 in SBICR) is set to “1”, internal reset signal pulse is generated and

inputted into SBI circuit.

All command registers and status registers are initialized to an initial value.

SWRST is automatically cleared to “0” after initializing SBI circuit.

2007-10-19

TMP88CU74F Datasheet(PDF) 90 Page - Toshiba Semiconductor