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PI6CB332016A Datasheet(PDF) 8 Page - Diodes Incorporated

Part # PI6CB332016A
Description  16-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application
PDF  27 Pages
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Manufacturer  DIODES [Diodes Incorporated]
Direct Link  http://www.diodes.com
Logo DIODES - Diodes Incorporated

PI6CB332016A Datasheet(HTML) 8 Page - Diodes Incorporated

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A Product Line of
Diodes Incorporated
PI6CB332016A
November 2024
© 2024 Copyright Diodes Incorporated. All Rights Reserved.
PI6CB332016A
Document Number DS45931 Rev 3-2
www.diodes.com
HCSL Input Characteristics(1)
Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions
Symbol
Parameters
Conditions
Min.
Typ.
Max.
Units
fIN
Input Frequency
VDD = 3.3V
1
100
400
MHz
Autoparking on
25
MHz
Autoparking off
1
MHz
VIHDIF
Diff. Input High Voltage (3)
IN+, IN-, single-end measure-
ment
330
1150
mV
Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions
Symbol
Parameters
Conditions
Min.
Typ.
Max.
Units
VIH
Input High Voltage
Single-ended inputs, except
SMBus
0.75
VDD
VDD
+0.3
V
VIM
Input Mid Voltage
SADR0_TRI, SADR1_TRI, BW_
SEL_TRI
0.4VDD 0.5VDD 0.6VDD
V
VIL
Input Low Voltage
Single-ended inputs, except
SMBus
–0.3
0.25
VDD
V
IIH
Input High Current
Single-ended inputs with pullup/
pulldown resistor, VIN = VDD
50
uA
IIL
Input Low Current
Single-ended inputs with pullup/
pulldown resistor, VIN = 0V
–50
µA
CIN
Input Capacitance
1.5
5
pF
LVCMOS DC Electrical Characteristics
Symbol
Parameters
Conditions
Min.
Typ.
Max.
Units
tDHOLD
SBI_IN Hold Time
SBI_IN hold after SBI_CLK ris-
ing edge.
2
ns
tCO
SBI_CLK to SBI_OUT
SBI_CLK rising edge to SBI_
OUT valid.
2
ns
tSHOLD
SHFT Hold Time
SHFT_LDB hold (high) after
SBI_CLK rising edge (SBI_CLK
to SHFT_LDB falling edge).
10
ns
tEN/DIS
Enable/Disable Time
Delay from SHFT_LDB falling
edge to next output configuration
taking effect.
4
12
clocks
tSLEW
Slew Rate
SBI_CLK (between 20% and
80%).
0.7
4
V/ns
SBI_OUT impedance
50
Ω



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