SLG51002

PMIC with High PSRR, Low Noise, Multi-Output LDOs

and Integrated Load Switches

Datasheet

Revision 3.11

25-Jul-2023

CFR0011-120-00

3 of 36

© 2023 Renesas Electronics Corporation

Figures

Figure 1: Block Diagram................................................................................................................................ 4

Figure 2: Pinout Diagram (Top View, Face Down) ....................................................................................... 5

Figure 3: Package Outline Drawing ............................................................................................................ 32

Figure 4: Recommended Landing Pattern .................................................................................................. 34

Tables

Table 1: Pin Description ................................................................................................................................ 5

Table 2: Pin Type Definition .......................................................................................................................... 7

Table 3: Absolute Maximum Ratings ............................................................................................................ 9

Table 4: Recommended Operating Conditions........................................................................................... 10

Table 5: Package Ratings ........................................................................................................................... 10

Table 6: Current Consumption .................................................................................................................... 11

Table 7: High-Voltage Digital I/O Characteristics........................................................................................ 11

Table 8: I/O Characteristics......................................................................................................................... 12

Table 9: Typical Delay Estimated for GPIO at T = 25 C. If VDDIO is not defined, VDDIO is same with

VDD............................................................................................................................................................. 16

Table 10: LDO_HV (LDO1, 2 and 3) Electrical Characteristics .................................................................. 16

Table 11: LDO_HC (LDO4 and 5) Electrical Characteristics ...................................................................... 21

Table 12: Load Switch Mode Electrical Characteristics .............................................................................. 24

Table 13: LDO_LV (LDO6, 7 and 8) Electrical Characteristics................................................................... 25

Table 14: Load Switch Mode Electrical Characteristics .............................................................................. 28

Table 15: VREF, IREF, Temperature Supervision Electrical Characteristics ............................................. 29

Table 16: Internal Oscillator Electrical Characteristics ............................................................................... 30

Table 17: UVLO Electrical Characteristics.................................................................................................. 31

Table 18: MSL Classification....................................................................................................................... 33

Table 19: Ordering Information ................................................................................................................... 36