List of figures

Figure 1.

Schematic diagram ................................................................. 2

Figure 2.

Pin connections ( top view)............................................................ 2

Figure 3.

Supply current vs. supply voltage ....................................................... 6

Figure 4.

Input offset voltage distribution VCC=36 V ................................................. 6

Figure 5.

Input offset voltage vs. temperature at VCC = 36 V ........................................... 7

Figure 6.

Input offset voltage vs. common-mode voltage at VCC = 36 V .................................... 7

Figure 7.

Input bias current vs. temperature ....................................................... 7

Figure 8.

Gain and phase vs. freq. at VCC=36 V .................................................... 7

Figure 9.

Phase margin vs. capacitive load at VCC=36 V .............................................. 7

Figure 10.

Overshoot vs. capacitive load at VCC=36V ................................................. 7

Figure 11.

Output voltage vs. output current (sinking) ................................................. 8

Figure 12.

Output voltage vs. output current (sourcing) ................................................ 8

Figure 13.

Current limiting vs. temperature ........................................................ 8

Figure 14.

Maximum output voltage vs. frequency at VCC = 15 V ......................................... 8

Figure 15.

Slew rate behavior at VCC = 36 V ....................................................... 8

Figure 16.

Slew rate behavior vs. temperature at VCC = 36 V ............................................ 8

Figure 17.

Common-mode rejection ratio and power supply rejection ratio at VCC = 5 V ......................... 9

Figure 18.

Noise vs. frequency at VCC = 36 V ...................................................... 9

Figure 19.

THD + N vs. voltage at VCC = 36 V ...................................................... 9

Figure 20.

THD + N vs. frequency at VCC = 36 V .................................................... 9

Figure 21.

Small-signal step response vs. time at VCC = 36 V ........................................... 9

Figure 22.

SO14 package outline .............................................................. 10

Figure 23.

TSSOP14 package outline ........................................................... 11

LM2902B

List of figures

DS13860 - Rev 2

page 16/17