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M65KG256AB Datasheet(PDF) 8 Page - STMicroelectronics |
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M65KG256AB Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 51 page  1 Summary description M65KG256AB 8/51 Figure 2. Functional Block Diagram Extended Mode Register TCSR, PASR Self Refresh Logic & Timer Internal Row Counter Row Pre- Decoders K KE E RAS CAS W UDQM/LDQM Refresh Column Active Bank Select Address Registers 4 Mb x 16 Bank D 4 Mb x 16 Bank C 4 Mb x 16 Bank B 4 Mb x 16 Bank A Memory Cell Array Column Decoders DQ0 DQ15 Column Pre- Decoders A0 A12 BA1 BA0 Column Add Counter Mode Register CAS Latency Data Out Control Burst Counter ai10242 Row Active K UDQS/LDQS |
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