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M65KG256AB Datasheet(PDF) 9 Page - STMicroelectronics |
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M65KG256AB Datasheet(HTML) 9 Page - STMicroelectronics |
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9 / 51 page ![]() M65KG256AB 2 Signal descriptions 9/51 2 Signal descriptions See Figure 1: Logic Diagram, and Table 1: Signal Names, for a brief overview of the signals connected to this device. 2.1 Address Inputs (A0-A12) The A0-A12 Address Inputs are used to select the row or column to be made active. If a row is selected, all thirteen, A0-A12 Address Inputs are used. If a column is selected, only the nine least significant Address Inputs, A0-A8, are used. In this latter case, A10 determines whether Auto Precharge is used: ● During a Read or Write operation: – If A10 is High (set to ‘1’), the Read or Write operation includes an Auto Precharge cycle. – If A10 is Low (set to ‘0’), the Read or Write cycle does not include an Auto Precharge cycle. ● When issuing a Precharge command: – If A10 is Low, only the bank selected by BA1-BA0 will be precharged. – If A10 is High, all the banks will be precharged. The address inputs are latched at the cross point of K rising edge and K falling edge. 2.2 Bank Select Address Inputs (BA0-BA1) The Banks Select Address Inputs, BA0 and BA1, are used to select the bank to be made active (see Table 2: Bank Selection using BA0-BA1). When selecting the addresses, the device must be enabled, the Row Address Strobe, RAS, must be Low, VIL, the Column Address Strobe, CAS, and W must be High, VIH. 2.3 Data Inputs/Outputs (DQ0-DQ15) The Data Inputs/Outputs output the data stored at the selected address during a Read operation, or to input the data during a write operation. 2.4 Chip Enable (E) The Chip Enable input, E, activates the memory state machine, address buffers and decoders when driven Low, VIL. When E is High, VIH, the device is not selected. 2.5 Column Address Strobe (CAS) The Column Address Strobe, CAS, is used in conjunction with Address Inputs A8-A0 and BA1- BA0, to select the starting column location prior to a read or write operation. |
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