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DIX4192IPFB Datasheet(PDF) 57 Page - Texas Instruments |
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DIX4192IPFB Datasheet(HTML) 57 Page - Texas Instruments |
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57 / 71 page ![]() SN74AVC1T45 orEquivalent IfVIO<+3.0V. VIO +5V 5 +3.3V 6 3 1 2 4 ToBalancedorUnbalanced LineInterface AESOUT 2 8 7 ToBalancedorUnbalanced LineInterface 3 6 5 1 1 SN75ALS191 SN74AHCT1G125 orEquivalent +5V 5 2 1 3 4 Directtoexternallogic operatingfromtheVIOsupply. AESOUT To+5VLogic (VIOsupply=+3.0Vto+3.3V) (1)ToshibaTOTX141,TOTX173,TOTX176,TOTX179,orequivalent. SN74AVC1T45 orEquivalent IfVIO<+3.0V. VIO 5 +3.3V 6 3 1 2 4 All-PlasticFiber (5or10metersmaximum) AESOUT Optical Transmitter (1) 57 DIX4192 www.ti.com SBFS031F – FEBRUARY 2006 – REVISED SEPTEMBER 2016 Product Folder Links: DIX4192 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Application Information (continued) Figure 79. Interfacing to an Optical Transmitter Module The AESOUT output may also be used to drive external logic or line driver devices directly. Figure 80 shows the recommended logic interface techniques, including connections with and without level translation. Figure 81 shows an external line driver interface using the Texas Instruments SN75ALS191 dual differential line driver. If the VIO supply of the DIX4192 is set from 3 V to 3.3 V, no logic level translation will be required between the AESOUT output and the line driver input. If the VIO supply voltage is below this range, then the optional logic level translation logic of Figure 81 will be required. The SN75ALS191 dual line driver is especially useful in applications where simultaneous 75- Ω and 110-Ω line interfaces are required. Figure 80. CMOS or TTL Output Logic Interface Figure 81. External Line Driver Interface |
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