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STM32L4S5AI Datasheet(PDF) 60 Page - STMicroelectronics |
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STM32L4S5AI Datasheet(HTML) 60 Page - STMicroelectronics |
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60 / 275 page  Functional overview STM32L4S5xx, STM32L4S7xx and STM32L4S9xx 60/275 DocID030322 Rev 2 3.41 Universal serial bus on-the-go full-speed (OTG_FS) The devices embed an USB OTG full-speed device/host/OTG peripheral with integrated transceivers. The USB OTG FS peripheral is compliant with the USB 2.0 specification and with the OTG 2.0 specification. It has software-configurable endpoint setting and supports suspend/resume. The USB OTG controller requires a dedicated 48 MHz clock that can be provided by the internal multispeed oscillator (MSI) automatically trimmed by 32.768 kHz external oscillator (LSE).This allows to use the USB device without external high speed crystal (HSE). The major features are: • Combined Rx and Tx FIFO size of 1.25 Kbytes with dynamic FIFO sizing • Supports the session request protocol (SRP) and host negotiation protocol (HNP) • One bidirectional control endpoint + 5 IN endpoints + 5 OUT endpoints • Eight host channels with periodic OUT support • HNP/SNP/IP inside (no need for any external resistor) • Software configurable to OTG 1.3 and OTG 2.0 modes of operation • OTG 2.0 Supports ADP (Attach detection Protocol) • USB 2.0 LPM (Link Power Management) support • Battery charging specification revision 1.2 support • Internal FS OTG PHY support For OTG/Host modes, a power switch is needed in case bus-powered devices are connected. The synchronization for this oscillator can also be taken from the USB data stream itself (SOF signalization) which allows crystal less operation. 3.42 Clock recovery system (CRS) The devices embed a special block which allows automatic trimming of the internal 48 MHz oscillator to guarantee its optimal accuracy over the whole device operational range. This automatic trimming is based on the external synchronization signal, which could be either derived from USB SOF signalization, from LSE oscillator, from an external signal on CRS_SYNC pin or generated by user software. For faster lock-in during startup it is also possible to combine automatic trimming with manual trimming action. 3.43 Flexible static memory controller (FSMC) The flexible static memory controller (FSMC) includes two memory controllers: • The NOR/PSRAM memory controller • The NAND/memory controller This memory controller is also named flexible memory controller (FMC). |
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