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STM32L4S5AI Datasheet(PDF) 203 Page - STMicroelectronics |
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STM32L4S5AI Datasheet(HTML) 203 Page - STMicroelectronics |
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203 / 275 page  DocID030322 Rev 2 203/275 STM32L4S5xx, STM32L4S7xx and STM32L4S9xx Electrical characteristics 250 SINAD Signal-to-noise and distortion ratio DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ, 1 kHz -70.4 - dB DAC output buffer OFF CL ≤ 50 pF, no RL, 1 kHz -71- ENOB Effective number of bits DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ, 1 kHz -11.4- bits DAC output buffer OFF CL ≤ 50 pF, no RL, 1 kHz -11.5- 1. Guaranteed by design. 2. Difference between two consecutive codes - 1 LSB. 3. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 4095. 4. Difference between the value measured at Code (0x001) and the ideal value. 5. Difference between ideal slope of the transfer function and measured slope computed from code 0x000 and 0xFFF when buffer is OFF, and from code giving 0.2 V and (VREF+ – 0.2) V when buffer is ON. Table 80. DAC accuracy(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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