ADC32RF44IRMPR datasheet(31/135 Pages) TI2

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IQ 2.6 GSPS

N/2

ADC

NCO 2,

16 Bits

2.6 GSPS

IQ Data, 2.6 GSPS

RX1 IQ Output

GPIO

SYSREF

RX2 IQ Output

NCO 1,

16 Bits

NCO 3,

16 Bits

NCO 4,

16 Bits

RX1 Real Output

Wideband IQ Output

2,3

Wideband Real Output

RX2 Real Output

JESD204B

fOUT / 4

LPF

N/2

LPF

IQ Data

Real[ ]

IQ Data

ADC32RF44

www.ti.com

SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017

Product Folder Links: ADC32RF44

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Example 1: fS = 2.6 GSPS, Bypass Mode (LMFS = 82820), K = 16

SYSREF = 2.6 GSPS / LCM (64, 20 × 16) / N = 8.125 MHz / N

Operate SYSREF at 4.0625 MHz (effectively divide-by-640, N = 2)

Example 2: fS = 2.6 GSPS, Divide-by-4 (LMFS = 8411), K = 16

SYSREF = 2.6 GSPS / LCM (4 ,64, 16) = 40.625 MHz / N

Operate SYSREF at 2.539063 MHz (effectively divide-by-1024, N = 16)

For proper device operation, disable the SYSREF signal after the JESD synchronization is established.

9.3.4 DDC Block

The ADC32RF44 provides a sophisticated on-chip, digital down converter (DDC) block that can be controlled

through SPI register settings and the general-purpose input/output (GPIO) pins. The DDC block supports two

basic operating modes: receiver (RX) mode with single- or dual-band DDC and wide-bandwidth observation

receiver mode.

Each ADC channel is followed by two DDC chains consisting of the digital filter along with a complex digital mixer

with a 16-bit numerically-controlled oscillator (NCO), as shown in Figure 71. The NCOs allow accurate frequency

tuning within the Nyquist zone prior to the digital filtering. One DDC chain is intended for supporting a dual-band

DDC configuration in receiver mode and the second DDC chain supports the wide-bandwidth output option for

the observation configuration. At any given time, either the single-band DDC, the dual-band DDC, or the

wideband DDC can be enabled. Furthermore, three different NCO frequencies can be selected on that path and

are quickly switched using the SPI or the GPIO pins to enable wide-bandwidth observation in a multi-band

application.

NOTE: Red traces show SYSREF going to the NCO blocks.

Figure 71. DDC Chains Overview (One ADC Channel Shown)

Additionally, the decimation filter block provides the option to convert the complex output back to real format at

twice the decimated, complex output rate. The filter response with a real output is identical to a complex output.

The band is centered in the middle of the Nyquist zone (mixed with fOUT / 4) based on a final output data rate of

fOUT.

ADC32RF44IRMPR Datasheet(PDF) 31 Page - Texas Instruments

ADC32RF44IRMPR Datasheet(HTML) 31 Page - Texas Instruments

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