ADC32RF44IRMPR datasheet(41/135 Pages) TI2

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NCO

2.6 GSPS

38230

1516.693 MHz

u S

NCO

DDCxNCOy

ADC32RF44

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SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017

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The complex exponential sequence is multiplied by the real input from the ADC to mix the desired carrier down

to 0 Hz.

Each ADC channel has two DDCs. The first DDC has three NCOs and the second DDC has one NCO. The first

DDC can dynamically select one of the three NCOs based on the GPIO pin or SPI selection. In wide-bandwidth

mode (lower decimation factors, for example, 4 and 6), there can only be one DDC for each ADC channel. The

NCO frequencies can be programmed independently through the DDCx, NCO[4:1], and the MSB and LSB

The NCO frequency setting is set by the 16-bit register value given by Equation 3:

where

•

x = 0, 1

•

y = 1 to 4

(3)

For example:

If fS = 2.6 GSPS, then the NCO register setting = 38230 (decimal).

Thus, fNCO is defined by Equation 4:

(4)

Any register setting changes that occur after the JESD204B interface is operational results in a non-deterministic

NCO phase. If a deterministic phase is required, the JESD204B interface must be reinitialized after changing the

In bypass mode (when decimation filters are not used), the NCOs are powered down in order to avoid creating

unwanted spurs.

9.3.5 NCO Switching

The first DDC (DDC0) on each ADC channel provides three different NCOs that can be used for phase-coherent

frequency hopping. This feature is available in both single-band and dual-band mode, but only affects DDC0.

The NCOs can be switched through an SPI control or by using the GPIO pins with the register configurations

shown in Table 5 for channel A (50xxh) and channel B (58Xxh). The assignment of which GPIO pin to use for

INSEL0 and INSEL1 is done based on Table 6, using registers 5438h and 5C38h. The NCO selection is done

based on the logic selection on the GPIO pins; see Table 7 and Figure 99.

Table 5. NCO Register Configurations

ADDRESS

DESCRIPTION

NCO CONTROL THROUGH GPIO PINS

NCO SEL pin

500Fh, 580Fh

Selects the NCO control through the SPI (default) or a GPIO pin.

INSEL0, INSEL1

5438h, 5C38h

Selects which two GPIO pins are used to control the NCO.

NCO CONTROL THROUGH SPI CONTROL

NCO SEL pin

500Fh, 580Fh

Selects the NCO control through the SPI (default) or a GPIO pin.

NCO SEL

5010h, 5810h

Selects which NCO to use for DDC0.

Table 6. GPIO Pin Assignment

INSELx[1:0] (Where x = 0 or 1)

GPIO PIN SELECTED

GPIO4

GPIO1

GPIO3

GPIO2

ADC32RF44IRMPR Datasheet(PDF) 41 Page - Texas Instruments

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