ADC32RF44IRMPR datasheet(61/135 Pages) TI2

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R/W

SDIN

SCLK

SEN

RESET

A11 A10

ADC32RF44

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SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017

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9.4.3.3 Serial Register Write: Digital Bank

The digital bank contains seven pages (Offset Corrector Page for channel A and B; Digital Gain Page for channel

A and B; Main digital Page for channel A and B; and JESD Digital Page). The timing for the individual page

selection is shown in Figure 117. The registers located in the pages of the digital bank can be programmed by:

1. Driving the SEN pin low.

2. Setting the M bit to 1 and specifying the page with with the desired register. There are seven pages in Digital

Bank. These pages can be selected by appropriately programming register bits DIGITAL BANK PAGE SEL,

located in addresses 002h, 003h, and 004h, using three consecutive SPI cycles. Addressing in a SPI cycle

begins with 4xxx when selecting a page from digital bank because the M bit must be set to 1.

–

To select the offset corrector page channel A: write address 4004h with 61h, 4003h with 00h, and 4002h

with 00h.

–

To select the offset corrector page channel B: write address 4004h with 61h, 4003h with 01h, and 4002h

with 00h.

–

To select the digital gain page channel A: write address 4004h with 61h, 4003h with 00h, and 4002h with

05h.

–

To select the digital gain page channel B: write address 4004h with 61h, 4003h with 01h, and 4002h with

05h.

–

To select the main digital page channel A: write address 4004h with 68h, 4003h with 00h, and 4002h with

00h.

–

To select the main digital page channel B: write address 4004h with 68h, 4003h with 01h, and 4002h with

00h.

–

To select the JESD digital page: write address 4004h with 69h, 4003h with 00h, and 4002h with 00h.

Figure 117. SPI Write Timing Diagram for Digital Bank Page Selection

ADC32RF44IRMPR Datasheet(PDF) 61 Page - Texas Instruments