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ADC32RF44IRMPR Datasheet(PDF) 94 Page - Texas Instruments |
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ADC32RF44IRMPR Datasheet(HTML) 94 Page - Texas Instruments |
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94 / 135 page  94 ADC32RF44 SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017 www.ti.com Product Folder Links: ADC32RF44 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 9.5.12.2 Register 001h (address = 001h), Decimation Filter Page Figure 166. Register 001h 7 6 5 4 3 2 1 0 0 0 0 0 DECIM FACTOR W-0h W-0h W-0h W-0h R/W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 74. Register 001h Field Descriptions Bit Field Type Reset Description 7-4 0 W 0h Must write 0 3-0 DECIM FACTOR R/W 0h These bits configure the decimation filter setting. 0000 = Divide-by-4 complex 0001 = Divide-by-6 complex 0010 = Divide-by-8 complex 0011 = Divide-by-9 complex 0100 = Divide-by-10 complex 0101 = Divide-by-12 complex 0110 = Not used 0111 = Divide-by-16 complex 1000 = Divide-by-18 complex 1001 = Divide-by-20 complex 1010 = Divide-by-24 complex 1011 = Not used 1100 = Divide-by-32 complex 9.5.12.3 Register 002h (address = 2h), Decimation Filter Page Figure 167. Register 002h 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 DUAL BAND EN W-0h W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 75. Register 002h Field Descriptions Bit Field Type Reset Description 7-1 0 W 0h Must write 0 0 DUAL BAND EN R/W 0h This bit enables the dual-band DDC filter for the corresponding channel. 0 = Single-band DDC 1 = Dual-band DDC |
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