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ADC32RF44IRMPR Datasheet(PDF) 101 Page - Texas Instruments |
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ADC32RF44IRMPR Datasheet(HTML) 101 Page - Texas Instruments |
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101 / 135 page ![]() 101 ADC32RF44 www.ti.com SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017 Product Folder Links: ADC32RF44 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 9.5.12.20 Register 01Fh (address = 01Fh), Decimation Filter Page Figure 184. Register 01Fh 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 WBF 6DB GAIN W-0h W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 93. Register 01Fh Field Descriptions Bit Field Type Reset Description 7-1 0 W 0h Must write 0 0 WBF 6DB GAIN R/W 0h This bit scales the output of the wide bandwidth DDC filter by 2 (6 dB) to compensate for real-to-complex conversion and image suppression. This setting only applies to the high-bandwidth filter path (divide-by-4 and -6). 0 = Normal operation 1 = 6-dB digital gain is added 9.5.12.21 Register 033h-036h (address = 033h-036h), Decimation Filter Page Figure 185. Register 033h 7 6 5 4 3 2 1 0 CUSTOM PATTERN1[7:0] R/W-0h LEGEND: R/W = Read/Write; -n = value after reset Figure 186. Register 034h 7 6 5 4 3 2 1 0 CUSTOM PATTERN1[15:8] R/W-0h LEGEND: R/W = Read/Write; -n = value after reset Figure 187. Register 035h 7 6 5 4 3 2 1 0 CUSTOM PATTERN2[7:0] R/W-0h LEGEND: R/W = Read/Write; -n = value after reset Figure 188. Register 036h 7 6 5 4 3 2 1 0 CUSTOM PATTERN2[15:8] R/W-0h LEGEND: R/W = Read/Write; -n = value after reset Table 94. Register 033h-036h Field Descriptions Bit Field Type Reset Description 7-0 CUSTOM PATTERN R/W 0h These bits set the custom test pattern in address 33h, 34h, 35h, or 36h. |
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