ADC32RF44IRMPR datasheet(111/135 Pages) TI2

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ADC32RF44

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SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017

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9.5.13.12 Register 021h (address = 021h), Power Detector Page

Figure 218. Register 021h

PWRDETACCU

W-0h

R/W-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

Table 110. Register 021h Field Descriptions

Bit

Field

Type

Reset

Description

7-5

Must write 0

4-0

PWRDETACCU

R/W

These bits program the block length to be used for RMS power

computation.

The block length is defined in terms of fS / 8 clocks and can be

programmed as 2M, where M = 0 to 16.

9.5.13.13 Register 022h-025h (address = 022h-025h), Power Detector Page

Figure 219. Register 022h

PWRDETH[7:0]

R/W-0h

LEGEND: R/W = Read/Write; -n = value after reset

Figure 220. Register 023h

PWRDETH[15:8]

R/W-0h

LEGEND: R/W = Read/Write; -n = value after reset

Figure 221. Register 024h

PWRDETL[7:0]

R/W-0h

LEGEND: R/W = Read/Write; -n = value after reset

Figure 222. Register 025h

PWRDETL[15:8]

R/W-0h

LEGEND: R/W = Read/Write; -n = value after reset

Table 111. Register 022h-025h Field Descriptions

Bit

Field

Type

Reset

Description

7-0

PWRDETH[15:0]

PWRDETL[15:0]

R/W

The computed average power is compared against these high and low

thresholds. One LSB of the thresholds represents 1 / 216.

Example: if PWRDETH is set to –14 dBFS from peak, (10(–14 / 20))2 × 216 = 2609,

then set 5422h, 5423h, 5C22h, 5C23h = 0A31h.

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