DAC7750IPWPR.B datasheet(40/56 Pages) TI2

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10 Power Supply Recommendations

The DACx750 family operates within the specified single-supply range of 10 V to 36 V applied to the AVDD pin.

The digital supply, DVDD, operates within the specified supply range of 2.7 V to 5.5 V or powered by the internal

4.6-V LDO, as described in Section 8.3.4.

Switching power supplies and DC/DC converters often have high-frequency glitches or spikes riding on the

output voltage. In addition, digital components can create similar high-frequency spikes. This noise can be easily

coupled into the DAC output voltage or current through various paths between the power connections and

analog output. To further reduce noise, include bulk and local decoupling capacitors.

CAUTION

Do not ramp the supplies for the DACx750 faster than 1 V/ns or damage may result to the device. A

10-Ω series resistor from the analog supply to the device AVDD connection helps reduce the supply

ramp.

The DACx750 has internal power on reset (POR) circuitry for both the digital DVDD and analog AVDD supplies.

This circuitry makes sure that the internal logic and power-on state of the DAC power up to the proper state

independent of the supply sequence. The recommended power-supply sequence is to first have the analog

AVDD supply come up, followed by the digital DVDD supply. DVDD can come up first as long as AVDD ramps to

at least 5 V within 50 μs. If neither condition can be satisfied, issue a software reset command using the SPI bus

after both AVDD and DVDD are stable.

The current consumption on the AVDD pin and current ranges for the current output are listed in Section 7.5.

The power supply must meet the requirements listed in Section 7.5.

11 Layout

11.1 Layout Guidelines

To maximize the performance of the DACx750 in any application, good layout practices and proper circuit design

must be followed. A few recommendations specific to the DACx750 are:

• As illustrated in Figure 9-1, CAP2 is directly connected to the input of the final IOUT amplifier. Any noise

or unwanted ac signal routed near the CAP1 and CAP2 pins could capacitively couple onto internal nodes

and affect IOUT. Therefore, make sure to avoid routing any digital or HART signal traces over the CAP1 and

CAP2 traces.

• Connect the thermal PAD to the lowest potential in the system.

• Make sure that AVDD has decoupling capacitors local to the respective pins.

• Place the reference capacitor close to the reference input pin.

• Avoid routing switching signals near the reference input.

• For designs that include protection circuits:

– Place diversion elements, such as TVS diodes or capacitors, close to off-board connectors to make sure

that return current from high-energy transients does not cause damage to sensitive devices.

– Use large, wide traces to provide a low-impedance path to divert high-energy transients away from I/O

pins.

DAC7750, DAC8750

SBAS538D – DECEMBER 2013 – REVISED DECEMBER 2021

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