L9679ETR datasheet(61/127 Pages) STMICROELECTRONICS

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RSDRx(x=0 to 11) @FLT = 0

Remote sensor data/fault registers ch_x (x=0 to 3) slot_x (x=1 to 3)

Note:

The value in Bit15 (FLT) will re-define the use of the other bits, hence the tables below are divided into two

groups

ch0 slot 1 (RSDR0); ch1 slot 1 (RSDR1); ch2 slot 1 (RSDR2); ch3 slot 1 (RSDR3);

ch0 slot 2 (RSDR4); ch1 slot 2 (RSDR5); ch2 slot 2 (RSDR6); ch 3 slot 2 (RSDR7)

ch0 slot 3 (RSDR8); ch1 slot 3 (RSDR9); ch2 slot 3 (RSDR10); ch3, slot 3 (RSDR11)

Note:

Bit 15 = 0 NO FAULT Condition

MISO_RS

(PSI5)

CRC

LCID [3:0]

DATA [9:0]

ID:

50 (RSDR0), 51 (RSDR1), 52 (RSDR2), 53 (RSDR3), 54 (RSDR4), 55 (RSDR5), 56 (RSDR6),

57 (RSDR6), 58 (RSDR8), 59 (RSDR9), 5A (RSDR10), 5B (RSDR11)

Type:

Read:

5000 (RSDR0), 5100 (RSDR1), 5200 (RSDR2), 5300 (RSDR3), 5400 (RSDR4), 5500

(RSDR5), 5600 (RSDR6), 5700 (RSDR7), 5800 (RSDR8), 5900 (RSDR9), 5A00 (RSDR10),

5B00 (RSDR11)

Write:

POR

WSM

SSM

[19:17]

CRC[2:0]: CRC based on bits [16:0]

Updated based on bits [16:0]

[15]

FLT: Fault Status - Depending on Fault Status, the DATA bits are defined differently

Cleared when all of the following bits are '0': STG, STB, CURRENT_HI, OPENDET, RSTEMP,

INVALID, SLOT_ERROR, NODATA

Set when any of the following bits are '1': STG, STB, CURRENT_HI, OPENDET, RSTEMP,

INVALID, SLOT_ERROR, NODATA

0: No fault

1: Fault

[14]

On/Off: Channel On/Off Status

Cleared by SSM_RESET or when channel is commanded OFF via SPI RSCTRL or when the STG

bit is set or the RSTEMP bit is set

Set when channel is commanded ON by SPI RSCTRL

0 Off

1 On

L9679E

SPI interface

DS12485 - Rev 8

page 61/127

L9679ETR Datasheet(PDF) 61 Page - STMicroelectronics

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