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DP83849IFVS/NOPB Datasheet(PDF) 17 Page - Texas Instruments

Part # DP83849IFVS/NOPB
Description  DP83849IF PHYTER™ DUAL Industrial Temperature with Fiber Support (FX) and Flexible Port Switching Dual Port 10/100 Mb/s Ethernet Physical Layer Tranceiver
PDF  108 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DP83849IFVS/NOPB Datasheet(HTML) 17 Page - Texas Instruments

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T2.2.4
T2.2.2
32 CLOCKS
T2.2.3
output
input
Vcc
X1 clock
Hardware
RESET_N
MDC
Latch-In of Hardware
Configuration Pins
Dual Function Pins
Become Enabled As Outputs
T2.2.1
DP83849IF
www.ti.com
SNOSAX8D – JUNE 2009 – REVISED APRIL 2013
4.6
AC Specifications — Reset Timing
(1)
Parameter
Description
Notes
Min
Typ
Max
Units
T2.2.1
Post RESET Stabilization time prior to
MDIO is pulled high for 32-bit serial
3
µs
MDC preamble for register accesses
management initialization
T2.2.2
Hardware Configuration Latch-in Time
Hardware Configuration Pins are
3
µs
from the Deassertion of RESET (either
described in the Pin Description
soft or hard)
section
T2.2.3
Hardware Configuration pins transition
50
ns
to output drivers
T2.2.4
RESET pulse width
X1 Clock must be stable for at min.
1
µs
of 1us during RESET pulse low time.
(1)
It is important to choose pull-up and/or pull-down resistors for each of the hardware configuration pins that provide fast RC time
constants in order to latch-in the proper value prior to the pin transitioning to an output driver.
Copyright © 2009–2013, Texas Instruments Incorporated
Electrical Specifications
17
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Product Folder Links: DP83849IF



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