DP83849IFVSSLASHNOPB datasheet(69/108 Pages) TI2

69 / 108 page

DP83849IF

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SNOSAX8D – JUNE 2009 – REVISED APRIL 2013

Reset Operation

The DP83849IF includes an internal power-on reset (POR) function and does not need to be explicitly

reset for normal operation after power up. If required during normal operation, the device can be reset by

a hardware or software reset.

9.1

HARDWARE RESET

A hardware reset is accomplished by applying a low pulse (TTL level), with a duration of at least 1 ms, to

the RESET_N pin. This will reset the device such that all registers will be reinitialized to default values and

the hardware configuration values will be re-latched into the device (similar to the power-up/reset

operation).

9.2

FULL SOFTWARE RESET

A full-chip software reset is accomplished by setting the reset bit (bit 15) of the Basic Mode Control

software reset has concluded is approximately 1 µs.

The software reset will reset the device such that all registers will be reset to default values and the

hardware configuration values will be maintained. Software driver code must wait 3 ms following a

software reset before allowing further serial MII operations with the DP83849IF.

9.3

SOFT RESET

A partial software reset can be initiated by setting the Soft Reset bit (bit 9) in the PHYCR2 Register.

Setting this bit will reset all transmit and receive operations, but will not reset the register space. All

Reset Operation

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DP83849IFVS/NOPB Datasheet(PDF) 69 Page - Texas Instruments