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DP83849IFVS/NOPB Datasheet(PDF) 20 Page - Texas Instruments |
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DP83849IFVS/NOPB Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 108 page ![]() Data (J/K) IDLE T2.9.2 T2.9.1 CRS PMD Input Pair RXD[3:0] RX_DV RX_ER 10% 90% +1 rise +1 fall -1 fall -1 rise 90% 10% T2.8.1 T2.8.1 T2.8.1 T2.8.1 PMD Output Pair T2.8.2 PMD Output Pair eye pattern T2.8.2 DP83849IF SNOSAX8D – JUNE 2009 – REVISED APRIL 2013 www.ti.com 4.12 AC Specifications — 100BASE-TX Transmit Timing (tR/F & Jitter) (1) Parameter Description Notes Min Typ Max Units T2.8.1 100 Mb/s PMD Output Pair tR and tF 3 4 5 ns 100 Mb/s tR and tF Mismatch (2) 500 ps T2.8.2 100 Mb/s PMD Output Pair Transmit Jitter 1.4 ns (1) Rise and fall times taken at 10% and 90% of the +1 or -1 amplitude (2) Normal Mismatch is the difference between the maximum and minimum of all rise and fall times 4.13 AC Specifications — 100BASE-TX and 100BASE-FX MII Receive Packet Latency Timing (1) (2) Parameter Description Notes Min Typ Max Units T2.9.1 Carrier Sense ON Delay(3) 100BASE-TX mode 20 bits 100BASE-FX mode 10 T2.9.2 Receive Data Latency 100BASE-TX mode 24 bits 100BASE-FX mode 14 (1) PMD Input Pair voltage amplitude is greater than the Signal Detect Turn-On Threshold Value. (2) 1 bit time = 10 ns in 100 Mb/s mode. (3) Carrier Sense On Delay is determined by measuring the time from the first bit of the “J” code group to the assertion of Carrier Sense. 20 Electrical Specifications Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DP83849IF |
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