DM505LRBABF datasheet(108/295 Pages) TI2

108 / 295 page

vssa_osc0

Device

xo_osc0

xi_osc0

SPRS91v_CLK_03

108

DM505

SPRS976E – NOVEMBER 2016 – REVISED MAY 2018

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Specifications

Table 5-16. OSC0 Crystal Electrical Characteristics (continued)

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Crystal shunt capacitance

ESR = 30 Ω

ESR = 40 Ω

19.2 MHz, 20 MHz, 27

MHz

ESR = 50 Ω

19.2 MHz, 20 MHz

27 MHz

ESR = 60 Ω

19.2 MHz, 20 MHz

27 MHz

Not Supported

ESR = 80 Ω

19.2 MHz, 20 MHz

27 MHz

Not Supported

ESR = 100 Ω

19.2 MHz, 20 MHz

27 MHz

Not Supported

Crystal motional inductance for fp = 20 MHz

10.16

Crystal motional capacitance

3.42

tj(xiosc0)

Frequency accuracy(1), xi_osc0

Ethernet not used

±200

ppm

Ethernet RGMII using

derived clock

±50

ppm

(1) Crystal characteristics should account for tolerance+stability+aging.

When selecting a crystal, the system design must consider the temperature and aging characteristics of a

based on the worst case environment and expected life expectancy of the system.

Table 5-17 details the switching characteristics of the oscillator and the requirements of the input clock.

Table 5-17. Oscillator Switching Characteristics—Crystal Mode

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Oscillation frequency

19.2, 20, 27 MHz

MHz

tsX

Start-up time

5.9.4.1.2 OSC0 Input Clock

A 1.8-V LVCMOS-Compatible Clock Input can be used instead of the internal oscillator to provide the

SYS_CLK1 clock input to the system. The external connections to support this are shown in Figure 5-13.

The xi_osc0 pin is connected to the 1.8-V LVCMOS-Compatible clock source. The xi_osc0 pin is left

unconnected. The vssa_osc0 pin is connected to board ground (vss).

Figure 5-13. 1.8-V LVCMOS-Compatible Clock Input

Table 5-18 summarizes the OSC0 input clock electrical characteristics.

DM505LRBABF Datasheet(PDF) 108 Page - Texas Instruments

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