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PCI11010C Datasheet(PDF) 28 Page - Microchip Technology

Part # PCI11010C
Description  PCIe Switch with Integrated Ethernet MAC and Programmable I/O
PDF  46 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PCI11010C Datasheet(HTML) 28 Page - Microchip Technology

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2025 Microchip Technology Inc. and its subsidiaries
DS00006232A-page 28
PCI11010C
SPI_CTRL0_DO
SPI Controller 0 Data Out
This is the data out for the SPI port when configured for SPI operation (MOSI).
SPI_CTRL0_DI
SPI Controller 0 Data In
This is the SPI data in to the controller from the SPI controller (MISO). This pin must
have a weak pull-down applied at all times to prevent floating if configured for SPI opera-
tion.
SPI_CTRL0_CE0_N
SPI Controller 0 Chip Enable 0
This is an active low SPI chip enable output 0. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_CE1_N
SPI Controller 0 Chip Enable 1
This is an active low SPI chip enable output 1. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_CE2_N
SPI Controller 0 Chip Enable 2
This is an active low SPI chip enable output 2. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_CE3_N
SPI Controller 0 Chip Enable 3
This is an active low SPI chip enable output 3. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_CE4_N
SPI Controller 0 Chip Enable 4
This is an active low SPI chip enable output 4. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_CE5_N
SPI Controller 0 Chip Enable 5
This is an active low SPI chip enable output 5. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_CE6_N
SPI Controller 0 Chip Enable 6
This is an active low SPI chip enable output 6. If the SPI interface is enabled, this pin
must be pulled high in power-down states.
SPI_CTRL0_ALERT_N SPI Peripheral Alert
Active low SPI chip input. This pin enables a Debouncer (DB).
SPI Controller Interface 1 Functions
SPI_CTRL1_CLK
SPI Controller 1 Clock
This is the SPI clock output from the SPI controller. If the SPI interface is enabled, this
pin must be driven low during reset.
TABLE 3-4:
PROGRAMMABLE FUNCTIONS DESCRIPTIONS (CONTINUED)
Programmable
Function
Description



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