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PCI11010C Datasheet(PDF) 8 Page - Microchip Technology

Part # PCI11010C
Description  PCIe Switch with Integrated Ethernet MAC and Programmable I/O
PDF  46 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PCI11010C Datasheet(HTML) 8 Page - Microchip Technology

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2025 Microchip Technology Inc. and its subsidiaries
DS00006232A-page 8
PCI11010C
1.4
Reference Documents
TABLE 1-4:
REFERENCE DOCUMENTS
Reference
Document Name
Revision/Version
Date
[ACPI]
Advance Configuration and Power Interface (ACPI) Specification.
https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf
6.3
2019-01
[AEC-Q100-002E]
AEC - Q100-002, Human Body Model Electrostatic Discharge Test.
http://www.aecouncil.com/Documents/AEC_Q100-002E.pdf
E
August 20, 2013
[AEC-Q100-003E]
AEC - Q100-003, Machine Model (MM) Electrostatic Discharge Test
(decommissioned specification).
http://www.aecouncil.com/AECDocuments.html
E
[AEC-Q100-011C1]
AEC - Q100-011, Charged Device Model (CDM) Electrostatic Discharge Test.
http://www.aecouncil.com/Documents/AEC_Q100-011C1.pdf
C1
2013-03-12
[AN4255]
AN4255 PCI12000/PCI11xxx Register Map
Contact your Microchip representative for more information.
Rev. A
(02-21-22)
[ASME-Y14.5M]
ASME Y14.5M-2018, Dimensioning and Tolerancing.
https://www.asme.org/products/codes-standards/y145-2018-dimensioning-and-
tolerancing
14.5-2018
[I2CBus]
I2C bus specification and user manual.
https://www.nxp.com/docs/en/user-guide/UM10204.pdf
V.6
2014-04-04
[I2SBus]
I2S bus specification.
https://web.archive.org/web/20070102004400/http://www.nxp.com/acrobat_download/
various/I2SBUS.pdf
N/A
1996-06-05
[IEC61000-4-2]
IEC 61000-4-2:2008, Electromagnetic Compatibility (EMC) - Part 4-2: Testing
and measurement techniques - Electrostatic discharge immunity test.
https://webstore.iec.ch/publication/4189
2.0
2008-12-09
[JEP106]
JEDEC Standard, JEP106, Standard Manufacturer’s Identification Code.
https://www.jedec.org/system/files/docs/JEP106BB.pdf
BB
2020-06
[JESD22-A115C]
JEDEC, JESD22-A114F, Electrostatic Discharge (ESD) Sensitivity Testing
Human Body Model (HBM).
https://www.jedec.org/sites/default/files/docs/22A115C_0.pdf
5C
2010-11
[JESD78D]
JEDEC, IC Latch-Up Test, JESD78D.
https://www.jedec.org/sites/default/files/docs/JESD78D.pdf
D
2011-11
[JS-001-2017]
ANSI/ESDA/JEDEC JS-001-2017, for Electrostatic Discharge Sensitivity Testing,
Human Body Model (HBM) - Component Level.
https://www.jedec.org/system/files/docs/JS-001-2017.pdf
2017-05-12
[JS-002-2014]
ANSI/ESDA/JEDEC JS-002-2014, for Electrostatic Discharge Sensitivity Testing,
Charged Device Model (CDM) - Device Level.
https://www.jedec.org/system/files/docs/JS-002-2014.pdf
2015-04-07
[M.2]
PCI Express M.2 Specification.
https://pcisig.com/specifications/pciexpress/
Rev 3.0 v1.2
2019-06-26
[PCICode]
PCI Code and ID Assignment Specification.
https://pcisig.com/specifications/pciexpress/
Rev 1.11
2019-01-24
[PCIHotPlug]
PCI Hot-Plug Specification.
https://pcisig.com/specifications/pciexpress/
1.1
2001-06-20
[PCIe3.1a]
PCI Express Base Specification Revision 3.1a.
https://pcisig.com/specifications/pciexpress/
R3.1a
2015-12-07
[PCIe4]
PCI Express Base Specification Revision 4.0.
https://pcisig.com/specifications/pciexpress/
R4.0, V1.0
2017-09-27
[PCIe5]
PCI Express Base Specification Revision 5.0.
https://pcisig.com/specifications/pciexpress/
R5.0 V1.0
2019-05-22
[RMII]
Reduced Media Independent Interface (RMII).
http://ebook.pldworld.com/_eBook/-Telecommunications%2CNetworks-/TCPIP/RMII/
rmii_rev12.pdf
V1.2
1998-03-20



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