PCI11010C datasheet(4/46 Pages) MICROCHIP

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DS00006232A-page 4

PCI11010C

I²C

Inter-integrated Circuit: multi-Controller/multi-Target architecture. I²C is a 2-wire bus consisting

of: I²C SDA, I²C SCL. Defined in [I2CBus].

I²C SCL

I²C SCL is an abbreviation for the I²C Serial Clock line.

I²C SDA

I²C SDA is an abbreviation for the I²C Serial Data line.

I²C Controller

An I²C Controller refers to any device that initiates I²C transactions and drives the clock as

defined in [I2CBus].

I²C Controller Core

The I²C Controller Core implements both an I²C Controller and I²C Target.

I²C Target

An I²C Target is the Target of an I²C transaction which is driven by an I²C Controller as defined

in [I2CBus].

In-Band

In-Band refers to signaling sent using the main communication channel. See also Out-Of-Band.

IRQ

IRQ is an abbreviation for the Interrupt Request Line.

MAC

The Medium Access Control (MAC) forms part of the Data Link Layer as defined in OSI. The

MAC is responsible for controlling how devices in a network gain access to a medium and

permission to transmit data.

MFD

MFD is an abbreviation for Multi-Function Device.

Multi-Function Device

A Multi-Function Device is a PCI Device with more than one Physical Function. Physical

Functions in an MFD are numbered PF0, PF1, PF2 etc.

N/A

N/A is an abbreviation for Not Applicable.

NC is an abbreviation for Not Connected.

OCS

OCS is an abbreviation for Over-Current Sense.

OEM

OEM is an abbreviation for Original Equipment Manufacturer.

OTP

OTP is an abbreviation for One Time Programmable Memory.

Out-Of-Band

Out-Of-Band refers to signaling sent outside of the main communication channel. See also In-

Band.

PCB

PCB is an abbreviation for Printed Circuit Board.

PCI Bridge

The PCI Bridge is one of several PCI defined System Elements. A Function that connects a PCI/

PCI-X segment or PCI Express Port with an internal component interconnect or with another

PCI/PCI-X bus segment or PCI Express Port. A virtual PCI Bridge in a Root Complex or PCI

Switch must use the software configuration interface described in [PCIe5].

PCI Switch

A PCI Switch is a [PCIe5] System Element that connects two or more Ports to allow Packets to

be routed from one Port to another.

To configuration software, a PCI Switch appears as a collection of virtual PCI Bridges.

PCI Configuration Request

A PCI Configuration Request PCI Packet targeted at the Configuration Space.

See [PCIe5].

Note: This is not the same as a System Configuration Request.

PF is an abbreviation for Physical Function.

PHY

PHY is an abbreviation for “physical layer”, an electronic circuit required to implement physical

layer functions of OSI in a network interface controller.

Physical Function

Within a Device, the Physical Function, is an addressable entity in Configuration Space

associated with a single Function Number. Used to refer to one Function of a Multi-Function

Device, or to the only Function in a Single-Function Device.

A Pin is an external connection on the package enabling connection to the PCB.

PIO

PIO is an abbreviation for Programmable I/O. These are fully programmable input/output lines.

PLL

PLL is an abbreviation for Phase-Locked Loop.

Port Partner

Port Partner refers to a remote port which is connected to the device’s local port.

PVT Sensor

PVT Sensor is an abbreviation for Process-Voltage-Temperature Sensor.

QFN

QFN is an abbreviation for a Quad-Flat No-leads package.

RAM

RAM is an abbreviation for Random-access Memory (read/write).

RFE

RFE is an abbreviation for Receive Filtering Engine.

RGMII

RGMII is an abbreviation for Reduced Gigabit Media-Independent Interface as defined in

[RGMII].

RMII

RMII is an abbreviation for Reduced Media-Independent Interface as defined in [RMII].

ROM

ROM is an abbreviation for Read-only Memory.

TABLE 1-1:

GENERAL TERMS (CONTINUED)

Term

Description

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