PCI11010C datasheet(6/46 Pages) MICROCHIP

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DS00006232A-page 6

PCI11010C

1.2

Buffer Types

The pin buffer type definitions are detailed in Table 1-2. Refer to Chapter 3.0, "Pin Descriptions and Configuration" for

details on individual pin buffer type assignments.

TABLE 1-2:

BUFFER TYPE DESCRIPTIONS

Buffer

Description

Analog input.

Debouncer available on input pin (refer to Section 3.4, "Debouncers").

Input.

I/O-P

Analog input/output defined per the [PCIe3.1a] Specification.

ICLK

Crystal oscillator input pin.

RBIAS pin.

Input with Schmitt trigger in the

VDD33 power domain.

LVDS

Low Voltage Differential Signaling.

O_V10

Fixed voltage output with programmable output buffer up to 10 mA (2/4/8/10 mA) in the

VDD33 power domain.

OD_V10

Fixed voltage open drain output with programmable output buffer up to 10 mA

(2/4/8/10 mA) in the

VDD33 power domain.

OCLK

Crystal oscillator output pin.

Power pin.

Internal pull-down. Unless otherwise noted in the pin description, internal pull-downs

are always enabled.

Internal pull-down resistors prevent unconnected inputs from floating. Do not rely on

internal resistors to drive signals external to the device. When connected to a load that

must be pulled low, an external resistor must be added.

Internal pull-up. Unless otherwise noted in the pin description, internal pull-ups are

always enabled.

Internal pull-up resistors prevent unconnected inputs from floating. Do not rely on

internal resistors to drive signals external to the device. When connected to a load that

must be pulled high, an external resistor must be added.

RGMII_I

High-speed input defined per the Reduced Gigabit Media Independent Interface

(RGMII) 2.0 Specification.

RGMII_O

High-speed output defined per the Reduced Gigabit Media Independent Interface

(RGMII) 2.0 Specification.

SGMII_I

High-speed input defined per the Serial Gigabit Media Independent Interface (SGMII)

1.8 Specification.

SGMII_O

High-speed output defined per the Serial Gigabit Media Independent Interface (SGMII)

1.8 Specification.

VIS

Variable voltage Schmitt-triggered input in the

VDDVARIO power domain.

VO_V10

Variable voltage output with programmable output buffer up to 10 mA

(2/4/8/10 mA) in the

VDDVARIO power domain.

VOD_V10

Variable voltage open drain output with programmable output buffer up to 10 mA

(2/4/8/10 mA) in the

VDDVARIO power domain.

VIS-R

Variable voltage Schmitt-triggered input in the

VDDRGMII power domain.

VO-R_V10

Variable voltage output with programmable output buffer up to 10 mA

(2/4/8/10 mA) in the

VDDRGMII power domain.

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