LP87564-Q1 datasheet(21/99 Pages) TI2

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LP87561-Q1

LP87562-Q1, LP87563-Q1, LP87564-Q1, LP87565-Q1

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SNVSB22 – MARCH 2018

Product Folder Links: LP87561-Q1 LP87562-Q1 LP87563-Q1 LP87564-Q1 LP87565-Q1

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Feature Descriptions (continued)

8.3.1.5 Buck Converter Load-Current Measurement

Buck load current can be monitored via I2C registers. The monitored buck converter is selected with the

LOAD_CURRENT_BUCK_SELECT[1:0] bits in SEL_I_LOAD register. A write to this selection register starts a

current measurement sequence. The regulator is forced to PWM mode during the measurement. The

measurement sequence is 50 µs long, maximum. The LP8756x-Q1 device can be configured to give out an

interrupt (I_LOAD_READY bit in INT_TOP1 register) after the load current measurement sequence is finished.

Load current measurement interrupt can be masked with I_LOAD_READY_MASK bit (TOP_MASK1 register).

The measurement result can be read from registers I_LOAD_1 and I_LOAD_2. Register I_LOAD_1 bits

BUCK_LOAD_CURRENT[7:0] give out the LSB bits and register I_LOAD_2 bits BUCK_LOAD_CURRENT[9:8]

the MSB bits. The measurement result BUCK_LOAD_CURRENT[9:0] LSB is 20 mA, and maximum value of the

measurement corresponds to 20.46 A. If the selected buck regulator is a master phase, the measured current is

the total value of the master and slave phases. If the selected buck regulator is single-phase or slave phase, the

measured current is the output current of the selected phase.

8.3.1.6 Spread-Spectrum Mode

Systems with periodic switching signals may generate a large amount of switching noise in a set of narrowband

frequencies (the switching frequency and its harmonics). The usual solution to decrease noise coupling is to add

EMI filters and shields to the boards. The LP8756x-Q1 device has register-selectable spread-spectrum mode

which minimizes the need for output filters, ferrite beads, or chokes. In spread-spectrum mode, the switching

frequency varies around the center frequency, reducing the EMI emissions radiated by the converter and

associated passive components and PCB traces (see Figure 12). This feature is available only when internal RC

oscillator is used (PLL_MODE[1:0] = 00 in PLL_CTRL register), and it is enabled with the EN_SPREAD_SPEC

bit (PIN_FUNCTION register), and it affects all the buck cores.

Where a fixed-frequency converter exhibits large amounts of spectral energy at the switching frequency, the spread-

spectrum architecture of the LP8756x-Q1 spreads that energy over a large bandwidth.

Figure 12. Spread-Spectrum Modulation

8.3.2 Sync Clock Functionality

The LP8756x-Q1 device contains a CLKIN input to synchronize the switching clock of the buck regulator with the

external clock. The block diagram of the clocking and PLL module is shown in Figure 13. Depending on the

PLL_MODE[1:0] bits (in PLL_CTRL register) and the external clock availability, the external clock is selected,

and interrupt is generated, as shown in Table 2. The interrupt can be masked with SYNC_CLK_MASK bit in

TOP_MASK1 register. The nominal frequency of the external input clock is set by EXT_CLK_FREQ[4:0] bits (in

PLL_CTRL register), and it can be from 1 MHz to 24 MHz with 1-MHz steps. The external clock must be inside

accuracy limits (–30%/+10%) for valid clock detection.

LP87564-Q1 Datasheet(PDF) 21 Page - Texas Instruments