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LP87564-Q1 Datasheet(PDF) 4 Page - Texas Instruments

Part # LP87564-Q1
Description  LP8756x-Q1 16-A Buck Converter With Integrated Switches
PDF  99 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LP87564-Q1 Datasheet(HTML) 4 Page - Texas Instruments

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LP87561-Q1
LP87562-Q1, LP87563-Q1, LP87564-Q1, LP87565-Q1
SNVSB22 – MARCH 2018
www.ti.com
Product Folder Links: LP87561-Q1 LP87562-Q1 LP87563-Q1 LP87564-Q1 LP87565-Q1
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Copyright © 2018, Texas Instruments Incorporated
(1)
A: Analog Pin, D: Digital Pin, G: Ground Pin, P: Power Pin, I: Input Pin, O: Output Pin
Pin Functions
PIN
TYPE(1)
DESCRIPTION
NO.
NAME
1
FB_B2
A
Output voltage feedback (positive) for the BUCK2 converter.
2
EN3
D/I/O
Programmable enable signal for the buck regulators (can be also configured to select between
two buck output-voltage levels). This pin functions alternatively as GPIO3.
3
CLKIN
D/I
External clock input. Connect this pin to ground if the external clock is not used.
4, 17,
Thermal
Pad
AGND
G
Ground
5
SCL
D/I
Serial interface clock input for I2C access. Connect this pin to a pullup resistor.
6
SDA
D/I/O
Serial interface data input and output for I2C access. Connect this pin to a pullup resistor.
7
EN1
D/I/O
Programmable enable signal for the buck regulators (can be also configured to select between
two buck output voltage levels). This pin functions alternatively as GPIO1.
8
FB_B0
A
Output voltage feedback (positive) for the BUCK0 converter.
9
VIN_B0
P
Input for the BUCK0 converter. The separate power pins, VIN_Bx, are not connected together
internally. The VIN_Bx pins must be connected together in the application and be locally
bypassed.
10
SW_B0
A
BUCK0 switch node
11
PGND_B01
G
Power ground for the BUCK0 and BUCK1 converters
12
SW_B1
A
BUCK1 switch node
13
VIN_B1
P
Input for the BUCK1 converter. The separate power pins, VIN_Bx, are not connected together
internally. The VIN_Bx pins must be connected together in the application and be locally
bypassed.
14
FB_B1
A
Output voltage feedback (positive) for the BUCK1 converter. This pin functions alternatively as
the output ground feedback (negative) for the BUCK0 converter.
15
EN2
D/I/O
Programmable enable signal for the buck regulators (can be also configured to select between
two buck output voltage levels). This pin functions alternatively as GPIO2.
16
PGOOD
D/O
Power-good indication signal
18
VANA
P
Supply voltage for the analog and digital blocks. This pin must be connected to the same node
as VIN_Bx.
19
nINT
D/O
Open-drain interrupt output. This pin is active low.
20
NRST
D/I
Reset signal for the device
21
FB_B3
A
Output voltage feedback (positive) for the BUCK3 converter. This pin functions alternatively as
the output ground feedback (negative) for the BUCK2 converter.
22
VIN_B3
P
Input for the BUCK3 converter. The separate power pins, VIN_Bx, are not connected together
internally. The VIN_Bx pins must be connected together in the application and be locally
bypassed.
23
SW_B3
A
BUCK3 switch node
24
PGND_B23
G
Power ground for the BUCK2 and BUCK3 converters
25
SW_B2
A
BUCK2 switch node
26
VIN_B2
P
Input for the BUCK2 converter. The separate power pins, VIN_Bx, are not connected together
internally. The VIN_Bx pins must be connected together in the application and be locally
bypassed.



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