LP87564-Q1 datasheet(24/99 Pages) TI2

24 / 99 page

0.6V

Enable

Time

Voltage

Soft start

Ramp

BUCKx_CTRL2(SLEW_RATEx[2:0])

Resistive pull-down

(if enabled)

BUCKx_VSET[7:0]

INT_BUCK_x(BUCKx_PG_INT)

nINT

Host clears

interrupt

Powergood

interrupt

Powergood

BUCK_x_STAT(BUCKx_PG_STAT)

0.35V

Voltage decrease because of load

No new Powergood interrupt

BUCK_x_STAT(BUCKx_STAT)

LP87561-Q1

LP87562-Q1, LP87563-Q1, LP87564-Q1, LP87565-Q1

SNVSB22 – MARCH 2018

www.ti.com

Product Folder Links: LP87561-Q1 LP87562-Q1 LP87563-Q1 LP87564-Q1 LP87565-Q1

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Figure 14. Regulator Enable and Disable

8.3.4.2 Changing Output Voltage

The output voltage of the regulator can be changed by the ENx pin (voltage levels defined by the BUCKx_VOUT

and BUCKx_FLOOR_VOUT registers) or by writing to the BUCKx_VOUT and BUCKx_FLOOR_VOUT registers.

The voltage change is always slew-rate controlled, and the slew-rate is defined by the SLEW_RATE[2:0] bits (in

BUCKx_CTRL2 register). During voltage change the forced-PWM mode is used automatically. If the multiphase

operation is forced by the BUCKx_FPWM_MP bit (in BUCKx_CTRL1 register), the regulator operates in

multiphase mode (two phases in dual-phase configuration, 3 phases in 3-phase configuration, and 4 phases in 4-

phase configuration). If the multiphase operation is not forced, the number of phases are added and shedded

automatically to follow the required slew rate. When the programmed output voltage is achieved, the mode

becomes the one defined by the load current and the BUCKx_FPWM and BUCKx_FPWM_MP bits in

BUCKx_CTRL1 register.

The Power-Good interrupt is generated when the output voltage reaches the programmed voltage level, as

shown in Figure 15.

LP87564-Q1 Datasheet(PDF) 24 Page - Texas Instruments

LP87564-Q1 Datasheet(HTML) 24 Page - Texas Instruments

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