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LP87564-Q1 Datasheet(PDF) 60 Page - Texas Instruments |
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LP87564-Q1 Datasheet(HTML) 60 Page - Texas Instruments |
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60 / 99 page  60 LP87561-Q1 LP87562-Q1, LP87563-Q1, LP87564-Q1, LP87565-Q1 SNVSB22 – MARCH 2018 www.ti.com Product Folder Links: LP87561-Q1 LP87562-Q1 LP87563-Q1 LP87564-Q1 LP87565-Q1 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 8.6.1.38 I_LOAD_2 Address: 0x26 D7 D6 D5 D4 D3 D2 D1 D0 Reserved BUCK_LOAD_CURRENT[9:8] Bits Field Type Default Description 7:2 Reserved R 0h 1:0 BUCK_LOAD_CUR RENT[9:8] R 0h This register describes the three MSB bits of the average load current on the selected regulator with a resolution of 20 mA per LSB and maximum code corresponding to a 20.47-A current. 8.6.1.39 I_LOAD_1 Address: 0x27 D7 D6 D5 D4 D3 D2 D1 D0 BUCK_LOAD_CURRENT[7:0] Bits Field Type Default Description 7:0 BUCK_LOAD_CUR RENT[7:0] R 0x00 This register describes the eight LSB bits of the average load current on the selected regulator with a resolution of 20 mA per LSB and maximum code corresponding to a 20.47-A current. 8.6.1.40 PGOOD_CTRL1 Address: 0x28 D7 D6 D5 D4 D3 D2 D1 D0 PG3_SEL[1:0] PG2_SEL[1:0] PG1_SEL[1:0] PG0_SEL[1:0] Bits Field Type Default Description 7:6 PG3_SEL[1:0] R/W X PGOOD signal source control from the BUCK3 regulator 0h = Masked 1h = Power-good-threshold voltage 2h = Reserved, do not use 3h = Power-good-threshold voltage AND current limit 5:4 PG2_SEL[1:0] R/W X PGOOD signal source control from the BUCK2 regulator 0h = Masked 1h = Power-good-threshold voltage 2h = Reserved, do not use 3h = Power-good threshold voltage AND current limit 3:2 PG1_SEL[1:0] R/W X PGOOD signal source control from the BUCK1 regulator 0h = Masked 1h = Power-good-threshold voltage 2h = Reserved, do not use 3h = Power-good-threshold voltage AND current limit 1:0 PG0_SEL[1:0] R/W X PGOOD signal source control from the BUCK0 regulator 0h = Masked 1h = Power-good-threshold voltage 2h = Reserved, do not use 3h = Power-good-threshold voltage AND current limit 8.6.1.41 PGOOD_CTRL2 Address: 0x29 D7 D6 D5 D4 D3 D2 D1 D0 HALF_DELAY EN_PG0 _NINT PGOOD_SET _DELAY EN_PGFLT _STAT Reserved PGOOD_ WINDOW PGOOD_OD PGOOD_POL |
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