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STA333W Datasheet(PDF) 17 Page - STMicroelectronics

Part # STA333W
Description  2-channel high-efficiency digital audio system
PDF  42 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA333W Datasheet(HTML) 17 Page - STMicroelectronics

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STA333W
I2C bus specification
17/42
6.3
Write operation
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA333W acknowledges this and the writes for the byte of internal address. After
receiving the internal byte address the STA333W again responds with an
acknowledgement.
6.3.1
Byte write
In the byte write mode the master sends one data byte, this is acknowledged by the
STA333W. The master then terminates the transfer by generating a STOP condition.
6.3.2
Multi-byte write
The multi-byte write modes can start from any internal address. The master generating a
STOP condition terminates the transfer.
Figure 12.
Write mode sequence
Figure 13.
Read mode sequence
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DATA IN
ACK
STOP
BYTE
WRITE
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DATA IN
ACK
STOP
MULTIBYTE
WRITE
DATA IN
ACK
DEV-ADDR
ACK
START
RW
DATA
NO ACK
STOP
CURRENT
ADDRESS
READ
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DEV-ADDR
ACK
STOP
RANDOM
ADDRESS
READ
DATA
NO ACK
START
RW
DEV-ADDR
ACK
START
DATA
ACK
DATA
ACK
STOP
SEQUENTIAL
CURRENT
READ
DATA
NO ACK
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DEV-ADDR
ACK
SEQUENTIAL
RANDOM
READ
DATA
ACK
START
RW
DATA
ACK
NO ACK
STOP
DATA
RW=
HIGH



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