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STA333W Datasheet(PDF) 30 Page - STMicroelectronics |
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STA333W Datasheet(HTML) 30 Page - STMicroelectronics |
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30 / 42 page ![]() Register description STA333W 30/42 7.2 Volume control registers (addresses 0x06 - 0x0A) 7.2.1 Mute/line output configuration register Master mute Channel mute 7.2.2 Master volume register 7.2.3 Channel 1 volume D7 D6 D5 D4 D3 D2 D1 D0 C2M C1M MMUTE 000 Table 40. Master mute Bit R/W RST Name Description 0R/W 0MMUTE 0: normal operation 1: all channels are in mute condition Table 41. Channel mute Bit R/W RST Name Description 1R/W 0C1M Channel 1 mute: 0: no mute condition. It is possible to set the channel volume 1: Channel 1 in hardware mute 2R/W 0C2M Channel 2 mute: 0: no Mute condition. It is possible to set the channel volume 1: Channel 2 in hardware mute D7 D6 D5 D4 D3 D2 D1 D0 MV7 MV6 MV5 MV4 MV3 MV2 MV1 MV0 11 11 11 11 D7 D6 D5 D4 D3 D2 D1 D0 C1V7 C1V6 C1V5 C1V4 C1V3 C1V2 C1V1 C1V0 0 1100000 |
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