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AM2431BSDGHIALVR. Datasheet(PDF) 217 Page - Texas Instruments |
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AM2431BSDGHIALVR. Datasheet(HTML) 217 Page - Texas Instruments |
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217 / 282 page  6.11.5.16 PRU_ICSSG The device has integrated two identical Programmable Real-Time Unit Subsystem and Industrial Communication Subsystems - Gigabit (PRU_ICSSG), PRU_ICSSG0 and PRU_ICSSG1. The programmable nature of the PRU cores, along with their access to pins, events and all device resources, provides flexibility in implementing fast real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores in the device. For more details about features and additional description information on the device PRU_ICSSG, see the corresponding subsections within Signal Descriptions and Detailed Description sections. Note The PRU_ICSSG contains a second layer of multiplexing to enable additional functionality on the PRU GPO and GPI signals. This internal wrapper multiplexing is described in the PRU_ICSSG chapter in the device TRM. 6.11.5.16.1 PRU_ICSSG Programmable Real-Time Unit (PRU) Note The PRU_ICSSG PRU signals have different functionality depending on the mode of operation. The signal naming in this section matches the naming used in the PRU Module Interface section in the device TRM. Table 6-112. PRU_ICSSG PRU Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 1 3 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 30 pF 6.11.5.16.1.1 PRU_ICSSG PRU Direct Output Mode Timing Table 6-113. PRU_ICSSG PRU Switching Characteristics – Direct Output Mode see Figure 6-90 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRDO1 tsk(GPO-GPO) Skew, GPO to GPO 2 ns GPO[n:0] PRDO1 PRU_TIMING_02 A. n in GPO[n:0] = 19. Figure 6-90. PRU_ICSSG PRU Direct Output Timing www.ti.com AM2434, AM2432, AM2431 SPRSP65J – APRIL 2021 – REVISED JUNE 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 217 Product Folder Links: AM2434 AM2432 AM2431 |
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