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AM2431BSDGHIALVR. Datasheet(PDF) 115 Page - Texas Instruments |
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AM2431BSDGHIALVR. Datasheet(HTML) 115 Page - Texas Instruments |
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115 / 282 page  6.7.8 ADC10B Electrical Characteristics (ALX package) over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution (ALX package) 10 Bits VADC0_VREFP (1) Positive Reference Voltage 1.71 1.89 V VADC0_VREFN (1) Negative Reference Voltage VSS V VADC_AIN[7:0] Analog Input Voltage, ADC_AIN[7:0], Full-scale VSS VDDA_ADC0 V DNL Differential Non-Linearity > -1 +1 LSB INL Integral Non-Linearity -2 +2 LSB LSBGAIN-ERROR Gain Error ±10 LSB LSBOFFSET-ERROR Offset Error ±5 LSB SNR Signal-to-Noise Ratio Input Signal: 200kHz sine wave at -0.5 dB Full Scale 65 dB THD Total Harmonic Distortion Input Signal: 200kHz sine wave at -0.5 dB Full Scale -64 dB ZADC_AIN[0:7] Analog Input Impedance, ADC0_AIN[7:0] (2) Ω IIN Input Leakage ±10 μA CSMPL Sampling Capacitance 5.5 pF Sampling Dynamics FSMPL_CLK ADC0 SMPL_CLK Frequency 60 MHz tC Conversion Time 13 ADC0 SMPL_CLK Cycles tACQ Acquisition Time 2 257 ADC0 SMPL_CLK Cycles TR Sampling Rate ADC0 SMPL_CLK = 60MHz 4 MSPS General Purpose Input Mode (3) VIL Input Low Voltage 0.35 × VDDA_ADC0 V VILSS Input Low Voltage Steady State 0.35 × VDDA_ADC0 V VIH Input High Voltage 0.65 × VDDA_ADC0 V VIHSS Input High Voltage Steady State 0.65 × VDDA_ADC0 V VHYS Input Hysteresis Voltage 200 mV II Input Leakage Current ADC0_AIN[7:0] = VDDA_ADC0 or ADC0_AIN[7:0] = VSS 10 μA (1) ADC0_REFP and ADC0_REFN are directly connected to VDDA_ADC0 and VSS inside the SoC. References to ADC0_REFP and ADC0_REFN in this table must be considered as VDDA_ADC0 or VSS. (2) The ADC0_AIN pins are connected to an internal sampling capacitor for a user configurable acquisition time and acquisition frequency. The input impedance of the ADC0_AIN pins is a function of the sampling capacitance along with user configurable acquisition time and acquisition frequency. The designer must understand the time required for the source impedance of each ADC0_AIN pin to charge the internal sampling capacitor. The acquisition time must be set long enough for the internal sampling capacitor to settle to greater than 14 bits of accuracy. www.ti.com AM2434, AM2432, AM2431 SPRSP65J – APRIL 2021 – REVISED JUNE 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 115 Product Folder Links: AM2434 AM2432 AM2431 |
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