AM2431BSDGHIALVR. datasheet(123/282 Pages) TI2

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6.11.2.2.1 Power-Up Sequencing

Table 6-6 and Figure 6-6 describe the device power-up sequencing.

Note

All power rails must be turned off and decay below 300mV before initiating a new power-up sequence

anytime a power rail drops below the minimum value defined in Recommended Operating Conditions.

Table 6-5. Power-Up Sequencing – Supply / Signal Assignments

See: Figure 6-6

WAVEFORM

SUPPLY / SIGNAL NAME

VSYS(1), VMON_VSYS(2)

VDDSHV_MCU(3), VDDSHV0(3), VDDSHV1(3), VDDSHV2(3), VDDSHV3(3), VDDSHV4(3), VDDA_3P3_USB0,

VMON_3P3_SOC(4), VMON_3P3_MCU(4)

VDDSHV_MCU(5), VDDSHV0(5), VDDSHV1(5), VDDSHV2(5), VDDSHV3(5), VDDSHV4(5), VDDA_MCU,

VDDS_OSC, VDDA_ADC0, VDDA_PLL0, VDDA_PLL1, VDDA_PLL2, VDDA_1P8_SERDES0, VDDA_1P8_USB0,

VMON_1P8_SOC(6), VMON_1P8_MCU(6), VDDA_TEMP0, VDDA_TEMP1, VDDS_MMC0

VDDA_3P3_SDIO(7) (8), VDDSHV5(7)

VDDS_DDR(9), VDDS_DDR_C(9)

VDD_CORE(10), VDDA_0P85_USB0(10), VDDA_0P85_SERDES0(10), VDDA_0P85_SERDES0_C(10), VDD_MMC0(10),

VDDA_DLL_MMC0(10), VDDR_CORE(10) (10)

VPP(11)

MCU_PORz

MCU_OSC0_XI, MCU_OSC0_XO

(1)

VSYS represents the name of a supply which sources power to the entire system. This supply is expected to be a pre-regulated supply

that sources power management devices which source all other supplies.

(2)

VMON_VSYS input is used to monitor VSYS via an external resistor divider circuit. For more information, see Section 8.2.5, System

Power Supply Monitor Design Guidelines.

(3)

VDDSHV_MCU and VDDSHVx [x=0-4] are dual voltage IO supplies which can be operated at 1.8V or 3.3V depending on the

application requirements.

When any of the VDDSHV_MCU or VDDSHVx [x=0-4] IO supplies are operating at 3.3V, they shall be ramped up with other 3.3V

supplies during the 3.3V ramp period defined by this waveform.

(4)

The VMON_3P3_MCU and VMON_3P3_SOC inputs are used to monitor supply voltage and shall be connected to the respective 3.3V

supply source.

(5)

VDDSHV_MCU and VDDSHVx [x=0-4] are dual voltage IO supplies which can be operated at 1.8V or 3.3V depending on the

application requirements.

When any of the VDDSHV_MCU or VDDSHVx [x=0-4] IO supplies are operating at 1.8V, they shall be ramped up with other 1.8V

supplies during the 1.8V ramp period defined by this waveform.

(6)

The VMON_1P8_MCU and VMON_1P8_SOC inputs are used to monitor supply voltage and shall be connected to the respective 1.8V

supply source.

(7)

VDDA_3P3_SDIO was designed to support power-up or power-down without any dependency on other power rails. VDDSHV5 is a

dual voltage IO supply that was designed to support power-up, power-down, or dynamic voltage change without any dependency on

other power rails. This capability is required to support UHS-I SD Cards.

(8)

VDDA_3P3_SDIO is the 3.3V power rail for the internal SDIO_LDO. This power rail must be sourced from the same 3.3V power supply

that provides power to a UHS-I SD Card connected to MMC1, which allows the MMC1 IOs and the SD Card IOs to power-up and

power-down at the same time when the SD Card power supply is powered off to reset the SD Card. For this use case the SDIO_LDO

output (CAP_VDDSHV_MMC1) is used to power the VDDSHV5 IO power rail, which will ramp-up and ramp-down along with the

VDDA_3P3_SDIO power rail.

(9)

VDDS_DDR and VDDS_DDR_C are expected to be powered by the same source such that they ramp together.

(10) VDD_CORE, VDDA_0P85_USB0, VDDA_0P85_SERDES0, VDDA_0P85_SERDES0_C, VDD_MMC0, VDDA_DLL_MMC0, and

VDDR_CORE are expected to be powered by the same 0.85V source such that they ramp together.

(11) VPP is the 1.8V eFuse programming supply, which shall be left floating (HiZ) or grounded during power-up/down sequences and

during normal device operation. This supply shall only be sourced while programming eFuse.

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AM2434, AM2432, AM2431

SPRSP65J – APRIL 2021 – REVISED JUNE 2026

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