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CMV8000 Datasheet(PDF) 78 Page - ams-OSRAM AG |
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CMV8000 Datasheet(HTML) 78 Page - ams-OSRAM AG |
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78 / 90 page ![]() Document Feedback CMV8000 Register Description Preliminary Datasheet • PUBLIC DS000609 • v1-00 • 2019-Jun-12 89 │ 77 8.2.53 V_TGLOW2 Register (Address 95) Figure 122: V_TGLOW2 Register Addr: 95 V_TGLOW2 Bit Bit Name Default Access Bit Description [6:0] v_tglow2 64 Sets the pixel transfer gate low voltage for slope 1 in PWL HDR mode 8.2.54 V_TGLOW3 Register (Address 96) Figure 123: V_TGLOW3 Register Addr: 96 V_TGLOW3 Bit Bit Name Default Access Bit Description [6:0] v_tglow3 64 Sets the pixel transfer gate low voltage for slope 2 in PWL HDR mode 8.2.55 SLEW Register (Address 97-98) Figure 124: SLEW Register Addr: 97-98 SLEW Bit Bit Name Default Access Bit Description [3:0] rst 8 Sets the slew current for pixel reset signal [7:4] tg 8 Sets the slew current for pixel transfer gate signal [11:8] s1 8 Sets the slew current for the pixel S1 signal [15:12] s2 8 Sets the slew current for the pixel S2 signal |
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