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SN74LVC541APWR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVC541APWR Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 46 page ![]() SNx4LVC541A Octal Buffers/Drivers With 3-State Outputs 1 Features • Operates from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.1ns at 3.3V • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C • Support mixed-mode signal operation on all ports (5V input/output voltage with 3.3V VCC) • Ioff supports live insertion, partial-power-down mode, and back-drive protection • Latch-up performance exceeds 100mA per JESD 78 • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted, on all other products, production processing does not necessarily include testing of all parameters 2 Applications • Drive an indicator LED • Redrive a digital signal • Drive a transmission line • Hold a signal during controller reset 3 Description The SNx4LVC541A contains eight non-inverting buffers with 3-state outputs. The active low output enable pins (OE1 and OE2) control all eight channels, and are configured so that both must be low for the outputs to be active. Package Information PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3) SN54LVC541A J (CDIP, 20) 24.2mm × 7.62mm 24.2mm × 6.92mm W (CFP, 20) 13.09mm × 8.13mm 13.09mm × 6.92mm FK (LCCC, 20) 8.89mm × 8.89mm 8.89mm × 8.89mm SN74LVC541A PW (TSSOP, 20) 6.5mm × 6.4mm 6.5mm × 4.4mm DW (SOIC, 20) 12.80mm × 10.3mm 12.8mm × 7.5mm DB (SSOP, 20) 7.2mm × 7.8mm 7.50mm × 5.3mm NS (SOP, 20) 12.6mm × 7.8mm 12.6mm × 5.3mm DGS (VSSOP, 20) 5.1mm × 4.9mm 5.1mm × 3.0mm RKS (VQFN, 20) 4.5mm × 2.5mm 4.5mm × 2.5mm DGV (TVSOP, 20) 5.0mm × 6.4mm 5.0mm × 4.4mm RGY (VQFN, 20) 4.5mm × 3.5mm 4.5mm × 3.5mm (1) For more information, see Mechanical, Packaging, and Orderable Information. (2) The package size (length × width) is a nominal value and includes pins, where applicable. (3) The body size (length × width) is a nominal value and does not include pins. Ax Yx One of Eight 3-State Buffers OE2 OE1 Shared Control Logic Functional Block Diagram SN54LVC541A, SN74LVC541A SCAS298O – JANUARY 1993 – REVISED JUNE 2026 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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