SN74LVC541APWR datasheet(11/46 Pages) TI2

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results in excessive power consumption and can cause oscillations. See more details in Implications of Slow or

Floating CMOS Inputs.

Do not leave standard CMOS inputs floating at any time during operation. Terminate unused inputs at VCC or

GND. If a system does not always drive an input, consider adding a pull-up or pull-down resistor to provide a

valid input voltage. The resistor value depends on multiple factors; a 10kΩ resistor, however, is recommended

and typically meets all requirements.

7.3.4 Clamp Diode Structure

Figure 7-2 shows the inputs and outputs to this device have negative clamping diodes only.

CAUTION

Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage

to the device. The input and output voltage ratings may be exceeded if the input and output clamp-

current ratings are observed.

Figure 7-2. Electrical Placement of Clamping Diodes for Each Input and Output

7.4 Device Functional Modes

Table 7-1. Function Table

INPUTS(1)

OUTPUT(2)

OE1

OE2

(1)

L = input low, H = input high, X = don't care

(2)

L = output low, H = output high, Z = high impedance

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SN54LVC541A, SN74LVC541A

SCAS298O – JANUARY 1993 – REVISED JUNE 2026

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SN74LVC541APWR Datasheet(PDF) 11 Page - Texas Instruments