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RZ/G2H Datasheet(PDF) 99 Page - Renesas Technology Corp |
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RZ/G2H Datasheet(HTML) 99 Page - Renesas Technology Corp |
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99 / 169 page ![]() RZ/G Series, 2nd Generation Datasheet Section 3. Electrical Characteristics R01DS0483EJ0101 Rev.1.01 Page 99 of 169 Jun 30, 2025 Item Symbol Min. Typ. Max. Unit Measurement condition Figures LVDS Output Pulse Position 5 TPPOS5 5(TCP/7) -0.150 5TCP/7 5(TCP/7) +0.150 ns — Figure 3.14.2 LVDS Output Pulse Position 6 TPPOS6 6(TCP/7) -0.150 6TCP/7 6(TCP/7) +0.150 ns — Table 3.14.2 AC Characteristics in Dual-link (1.8-V I/O [LVDS]) [RZ/G2E] Conditions: VDDQ18_LVDS = VDD18_LVDSnPLL (n = 0, 1) = 1.8V ± 0.1V [RZ/G2E], GND = VSS = VSS_LVDSnPLL (n = 0, 1) = 0V [RZ/G2E], Ta = -40 to +85°C [RZ/G2E], Tj = -40 to +115°C [RZ/G2E] CL = 3pF Item Symbol Min. Typ. Max. Unit Measurement condition Figures Input Clock Frequency of LVDS FCPHIN 12.0 — 150.0 MHz — Figure 3.14.1 Output Clock Frequency of LVDS FCLKP/CLKN 5.0 — 75.0 MHz — Figure 3.14.2, Figure 3.14.3 Output Clock of LVDS TCP 13.3 — 200.0 ns — Output Data Rate of LVDS FDAP/DAN 35 — 525.0 Mbps — LVDS Output Pulse Position 0 TPPOS0 -0.200 0 0.200 ns — LVDS Output Pulse Position 1 TPPOS1 (TCP/7)-0.200 TCP/7 (TCP/7) +0.200 ns — LVDS Output Pulse Position 2 TPPOS2 2(TCP/7)- 0.200 2TCP/7 2(TCP/7)+ 0.200 ns — LVDS Output Pulse Position 3 TPPOS3 3(TCP/7)- 0.200 3TCP/7 3(TCP/7)+ 0.200 ns — LVDS Output Pulse Position 4 TPPOS4 4(TCP/7)- 0.200 4TCP/7 4(TCP/7)+ 0.200 ns — LVDS Output Pulse Position 5 TPPOS5 5(TCP/7)- 0.200 5TCP/7 5(TCP/7)+ 0.200 ns — LVDS Output Pulse Position 6 TPPOS6 6(TCP/7)- 0.200 6TCP/7 6(TCP/7)+ 0.200 ns — Figure 3.14.1 FCPHIN 1/FCPHIN DU_DOTCLKIN* |
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