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RZ/G2H Datasheet(PDF) 135 Page - Renesas Technology Corp |
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RZ/G2H Datasheet(HTML) 135 Page - Renesas Technology Corp |
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135 / 169 page ![]() RZ/G Series, 2nd Generation Datasheet Section 3. Electrical Characteristics R01DS0483EJ0101 Rev.1.01 Page 135 of 169 Jun 30, 2025 3.27 Serial ATA (Gen3) The description in this section is compliant with the following Serial ATA standard: 'Serial ATA International Organization: Serial ATA Revision 3.2, August 7, 2013'. Table 3.27.1 Serial ATA (Gen3) Interface Characteristics [RZ/G2H, RZ/G2N] Conditions: VDD33_SATA = VDD33_PCIE = 3.3 ± 0.3 V, VDD09_SATA = VDD09_PCIE = 0.82 -0.07 V / + 0.06 V, GND = 0 V, Tc = -40 to +115 °C [RZ/G2H], Ta = -40 to +85 °C [RZ/G2N], Tj = -40 to +115 °C [RZ/G2N] Test Item Symbol Min. Typ. Max. Unit Remarks RX Differential Input Voltage (Gen1i) Vdiff RX 325 — 600 mVppd *1 RX Differential Input Voltage (Gen2i) Vdiff RX 275 — 750 mVppd *1 RX Differential Input Voltage (Gen3i) Vdiff RX 200 — 900 mVppd *1 TX Differential Output Voltage (Gen1i) Vdiff TX 400 — 600 mVppd *2 TX Differential Output Voltage (Gen2i) Vdiff TX 400 — 700 mVppd *2 TX Differential Output Voltage (Gen3i) Vdiff TX 240 — 1000 mVppd *2 DC Coupled Common Mode Voltage (Gen1i) Vcm dc 200 — 450 mV *2 Unit Interval (Gen1i) TUI 666.4333 666.6667 670.2333 ps *3 Unit Interval (Gen2i) TUI 333.2167 333.3333 335.1167 ps *3 Unit Interval (Gen3i) TUI 166.6083 166.6667 167.5583 ps *3 COMRESET Transmit Gap Length (Gen1i and Gen2i and Gen3i) TScomreset — 480 — UIOOB *4 COMWAKE Transmit Gap Length (Gen1i and Gen2i and Gen3i) TScomwake — 160 — UIOOB *4 TX Differential Impedance (Gen1i) ZdiffTX 85 — 115 Ω *2 TX Single-Ended Impedance (Gen1i) Zs-eTX 40 — — Ω *2 RX Differential Impedance (Gen1i) ZdiffRX 85 — 115 Ω *1 RX Single-Ended Impedance (Gen1i) Zs-eRX 40 — — Ω *1 Notes: 1. RXP, RXN: DC test 2. TXP, TXN: DC test 3. Need Reference Clock (Low Voltage Swing, Differential Clocks). The nominal single-ended swing for each clock is 0 to 0.7 V and a nominal frequency of 100 MHz ± 100 PPM. 4 TXP, TXN: UIOOB (UI During OOB Signaling) = 646.67 to 686.67 ps, Not tested. Table 3.27.2 Serial ATA (Gen3) External Clock Accuracy Conditions: VDD09_PCIE = 0.82 V – 0.07 V / + 0.06 V, GND = 0 V, Tc = −40 to +115 °C [RZ/G2H] , Ta = -40 to +85 °C [RZ/G2N], Tj = -40 to +115 °C [RZ/G2N] Test Item Symbol Min. Typ. Max. Unit Remarks External clock accuracy (PCIE1_CLK_P, PCIE1_CLK_M) — — 100.000 — MHz Frequency accuracy: ±100 ppm or less RZ/G2H RZ/G2M V1.3 RZ/G2N RZ/G2E RZ/G2M V3.0 |
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