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RZ/G2H Datasheet(PDF) 142 Page - Renesas Technology Corp |
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RZ/G2H Datasheet(HTML) 142 Page - Renesas Technology Corp |
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142 / 169 page ![]() RZ/G Series, 2nd Generation Datasheet Section 3. Electrical Characteristics R01DS0483EJ0101 Rev.1.01 Page 142 of 169 Jun 30, 2025 Table 3.31.4 R-NANDC Timing [RZ/G2E] Conditions: VDDQ18 = VDDQ_MMC = 1.8 ± 0.1 V, GND = VSS = 0 V, Ta = -40 to +85 °C, Tj = -40 to +115 °C, CL = 30 pF Item Symbol Min. Typ. Max. Unit Figures Output signal delay tOD 0 — 2.2 ns Figure 3.31.1 rise-fall delay delta of each output signals tRFD 0 — 1 ns — Read data setup time from NFRE# rise tSD 8.75 — — ns Figure 3.31.1 Read data hold time from NFRE# rise tHD 0 — — ns Read data setup time from NFRE# rise (fast mode) tSD 8.75 – tpcyc *1 — — ns Read data hold time from NFRE# rise (fast mode) tHD tpcyc *1 — — ns NFWE# rise to NFRB# fall tWB (N+1) × tpcyc – 8 *1 *2 — — ns Ready to RE# low tRR (M+1) × tpcyc + 0 *1 *3 — — ns Notes: 1. tpcyc is a cycle time of S3D1Cϕ 2. N is value of TIME_SEQ_1.TWB bit 3. M is value of TIME_SEQ_1.TRR bit Figure 3.31.1 Input/output Timing in Synchronous Mode S3D1ϕ [RZ/G2M V1.3, RZ/G2N] S3D1Cϕ [RZ/G2E] (internal clock) NFCE# NFCLE NFALE NFWE# tOD tOD tOD tOD NFRE# tOD tOD NFDATA15-0 tOD tOD tSD tHD NFRB# tRR tWB |
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