EM78P342NP datasheet(74/102 Pages) EMC

74 / 102 page

EM78P341N/342N/343N

8-Bit Microprocessor with OTP ROM

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Product Specification (V1.0) 12.01.2006

(This specification is subject to change without further notice)

6.10.3 Using a Comparator as an Operation Amplifier

The comparator can be used as an operation amplifier if a feedback resistor is

externally connected from the input to the output. In this case, the Schmitt trigger can

be disabled for power saving purposes, by setting Bit 4, Bit 3 <COS1, COS0> of the

IOC80 register to <1,1>. See table under Section 6.2.4, IOC80 (Comparator and TCCA

Control Registers) for Comparator/OP select bits function description.

NOTE

Under Operation Amplifier:

■ The CMPIE (IOCE0.4), CMPWE (RE.2), and CMPIF (RE.4) bits are invalid.

■ The comparator interrupt is invalid.

■ The comparator wake-up is invalid.

6.10.4 Comparator Interrupt

CMPIE (IOCE0.4) must be enabled for the “ENI” instruction to take effect

Interrupt is triggered whenever a change occurs on the comparator output pin

The actual change on the pin can be determined by reading the Bit CMPOUT,

IOC80<5>.

CMPIF (RE.4), the comparator interrupt flag, can only be cleared by software

6.10.5 Wake-up from Sleep Mode

If the CMPWE bit of the RE register is set to “1,” the comparator remains active and

the interrupt remains functional, even under SLEEP mode.

If a mismatch occurs, the change will wake up the device from SLEEP mode.

The power consumption should be taken into consideration for the benefit of energy

conservation.

If the function is unemployed during SLEEP mode, turn off the comparator before

entering into sleep mode.

The Comparator is considered completed as determined by

COS1 and COS0 bits of IOC80 register setting selects Comparator.

CMPIF bit of RE register is set to “1”.

CMPWE bit of RE register is set to “1”. Wakes-up from Comparator (where it

remains in operation during sleep mode)

Wakes-up and executes the next instruction, if CMPIE bit of IOCE0 is enabled and

the “DISI” instruction is executed.

Wake-up and enters into Interrupt vector (address 0x00F), if ADIE bit of IOCE0 is

enabled and the “ENI” instruction is executed

Enters into Interrupt vector (address 0x00F), if CMPIE bit of IOCE0 is enabled and

the “ENI” instruction is executed.

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